AEC-Q100 with extended temperature range (-55°C to 125°C)
Frequencies between 1 MHz and 110 MHz accurate to
6 decimal places
Supply voltage of 1.8V or 2.25V to 3.63V
Excellent total frequency stability as low as ±20 ppm
Industry best G-sensitivity of 0.1 PPB/G
Low power consumption of 3.8 mA typical at 1.8V
LVCMOS/LVTTL compatible output
5-pin SOT23-5 package: 2.9 x 2.8 mm x mm
RoHS and REACH compliant, Pb-free, Halogen-free and
Antimony-free
Automotive, extreme temperature and other high-rel
electronics
Infotainment systems, collision detection devices, and
in-vehicle networking
Powertrain control
Electrical Characteristics
Table 1. Electrical Characteristics
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise
stated. Typical values are at 25°C and nominal supply voltage.
Parameters
Output Frequency Range
Frequency Stability
Symbol
f
F_stab
Min.
1
-20
-25
-30
-50
Operating Temperature
Range (ambient)
T_use
-40
-40
-40
-55
Supply Voltage
Current Consumption
Vdd
Idd
1.62
2.25
–
–
Duty Cycle
Rise/Fall Time
Output High Voltage
DC
Tr, Tf
VOH
45
–
–
90%
Typ.
–
–
–
–
–
–
–
–
–
1.8
–
4.0
3.8
–
1.5
1.3
–
Max.
110
+20
+25
+30
+50
+85
+105
+125
+125
1.98
3.63
4.8
4.5
55
3
2.5
–
Unit
MHz
ppm
ppm
ppm
ppm
°C
°C
°C
°C
V
V
mA
mA
%
ns
ns
Vdd
AEC-Q100 Grade 3
AEC-Q100 Grade 2
AEC-Q100 Grade 1
Extended cold, AEC-Q100 Grade1
All voltages between 2.25V and 3.63V including 2.5V, 2.8V,
3.0V and 3.3V are supported.
No load condition, f = 20 MHz, Vdd = 2.25V to 3.63V
No load condition, f = 20 MHz, Vdd = 1.8V
All Vdds
Vdd = 2.25V - 3.63V, 20% - 80%
Vdd = 1.8V, 20% - 80%
IOH = -4 mA (Vdd = 3.0V or 3.3V)
IOH = -3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOH = -2 mA (Vdd = 1.8V)
IOL = 4 mA (Vdd = 3.0V or 3.3V)
IOL = 3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOL = 2 mA (Vdd = 1.8V)
Pin 1, OE
Pin 1, OE
Pin 1, OE logic high or logic low
Measured from the time Vdd reaches its rated minimum value
f = 110 MHz. For other frequencies, T_oe = 100 ns + 3 * cycles
Vdd = 2.8V to 3.3V,
ST
= Low, Output is weakly pulled down
Vdd = 2.5V,
ST
= Low, Output is weakly pulled down
Vdd = 1.8V,
ST
= Low, Output is weakly pulled down
Condition
Refer to
Tables 14 to 16
for a list of supported frequencies
Inclusive of Initial tolerance at 25°C, 1st year aging at 25°C, and
variations over operating temperature, rated power supply
voltage and load (15 pF ± 10%).
Frequency Range
Frequency Stability and Aging
Operating Temperature Range
Supply Voltage and Current Consumption
LVCMOS Output Characteristics
Output Low Voltage
VOL
–
–
10%
Vdd
Input Characteristics
Input High Voltage
Input Low Voltage
Input Pull-up Impedance
Startup Time
Enable/Disable Time
Standby Current
VIH
VIL
Z_in
T_start
T_oe
I_std
70%
–
–
–
–
–
–
–
–
–
100
–
–
2.6
1.4
0.6
–
30%
–
5.5
130
–
–
–
Vdd
Vdd
kΩ
ms
ns
µA
µA
µA
Startup and Resume Timing
Rev 1.8
May 22, 2019
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SiT2024B
Automotive AEC-Q100 SOT23 Oscillator
Table 1. Electrical Characteristics (continued)
Parameters
RMS Period Jitter
RMS Phase Jitter (random)
Symbol
T_jitt
T_phj
Min.
–
–
–
–
Typ.
1.6
1.9
0.5
1.3
Max.
Jitter
2.5
3.0
–
–
ps
ps
ps
ps
f = 75 MHz, 2.25V to 3.63V
f = 75 MHz, 1.8V
f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz
f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz
Unit
Condition
Table 2. Pin Description
Pin
1
2
Symbol
GND
NC
Power
No Connect
Output Enable
3
OE/NC
No Connect
4
5
VDD
OUT
Power
Output
Functionality
Electrical ground
No connect
H
[1]
: specified frequency output
L: output is high impedance. Only output driver is disabled.
Any voltage between 0 and Vdd or Open
[1]
: Specified
frequency output. Pin 3 has no function.
Power supply voltage
[2]
Oscillator output
NC
2
Top View
GND
1
5
OUT
YXXXX
OE/NC
3
4
VDD
Figure 1. Pin Assignments
Notes:
1. In OE or ST mode, a pull-up resistor of 10 kΩ or less is recommended if pin 3 is not externally driven. If pin 3 needs to be left floating, use the NC option.
2. A capacitor of value 0.1 µF or higher between Vdd and GND is required.
Table 3. Absolute Maximum Limits
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part. Actual performance
of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Storage Temperature
Vdd
Electrostatic Discharge
Soldering Temperature (follow standard Pb free soldering guidelines)
Junction Temperature
[3]
Note:
3. Exceeding this temperature for extended period of time may damage the device.
Min.
-65
-0.5
–
–
–
Max.
150
4
2000
260
150
Unit
°C
V
V
°C
°C
Table 4. Thermal Consideration
[4]
Package
SOT23-5
θ
JA, 4 Layer Board
(°C/W)
421
θ
JC, Bottom
(°C/W)
175
Note:
4. Refer to JESD51 for
θJA
and
θJC
definitions, and reference layout used to determine the
θJA
and
θJC
values in the above table.
Table 5. Maximum Operating Junction Temperature
[5]
Max Operating Temperature (ambient)
85°C
105°C
125°C
Maximum Operating Junction Temperature
95°C
115°C
135°C
Note:
5. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.
Table 6. Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Moisture Sensitivity Level
Condition/Test Method
MIL-STD-883F, Method 2002
MIL-STD-883F, Method 2007
JESD22, Method A104
MIL-STD-883F, Method 2003
MSL1 @ 260°C
Rev 1.8
Page 2 of 15
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SiT2024B
Automotive AEC-Q100 SOT23 Oscillator
Test Circuit and Waveform
Test
Point
Vout
Vdd
tr
80% Vdd
Power
Supply
tf
5
15 pF
(including probe
and fixture
capacitance)
4
0.1µF
50%
20% Vdd
High Pulse
(TH)
Period
Low Pulse
(TL)
1
2
3
Vdd
1k
OE/ST Function
Figure 2. Test Circuit
[6]
Note:
6. Duty Cycle is computed as Duty Cycle = TH/Period.
Figure 3. Waveform
[6]
Timing Diagrams
90% Vdd
Vdd
Vdd
50% Vdd
T_oe
Pin 4 Voltage
T_start
No Glitch
during start up
OE Voltage
CLK Output
HZ
CLK Output
HZ
T_start: Time to start from power-off
T_oe: Time to re-enable the clock output
Figure 4. Startup Timing (OE Mode)
[7]
Figure 5. OE Enable Timing (OE Mode Only)
Vdd
OE Voltage
50% Vdd
T_oe
CLK Output
HZ
T_oe: Time to put the output in High Z mode
Figure 6. OE Disable Timing (OE Mode Only)
Note:
7. SiT2024 has “no runt” pulses and “no glitch” output during startup or resume.
Rev 1.8
Page 3 of 15
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SiT2024B
Automotive AEC-Q100 SOT23 Oscillator
Performance Plots
[8]
1.8 V
6.0
2.5 V
2.8 V
3V
3.3 V
DUT1
DUT8
DUT15
25
20
DUT2
DUT9
DUT16
DUT3
DUT10
DUT17
DUT4
DUT11
DUT18
DUT5
DUT12
DUT19
DUT6
DUT13
DUT20
DUT7
DUT14
5.5
5.0
Frequency (ppm)
0
20
40
60
80
100
15
10
5
0
-5
-10
-15
Idd (mA)
4.5
4.0
3.5
3.0
-20
-25
-55
-35
-15
5
25
45
65
85
105
125
Frequency (MHz)
Temperature (°C)
Figure 7. Idd vs Frequency
Figure 8. Frequency vs Temperature
1.8 V
4.0
3.5
2.5 V
2.8 V
3.0 V
3.3 V
55
54
53
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
RMS period jitter (ps)
3.0
2.5
2.0
1.5
1.0
0.5
46
Duty cycle (%)
0
20
40
60
80
100
52
51
50
49
48
47
0.0
45
0
20
40
60
80
100
Frequency (MHz)
Frequency (MHz)
Figure 9. RMS Period Jitter vs Frequency
Figure 10. Duty Cycle vs Frequency
1.8 V
2.5
2.5 V
2.8 V
3.0 V
3.3 V
2.5
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
2.0
2.0
Rise time (ns)
Fall time (ns)
1.5
1.5
1.0
1.0
0.5
0.5
0.0
-40
-20
0
20
40
60
80
100
120
0.0
-40
-20
0
20
40
60
80
100
120
Temperature (°C)
Temperature (°C)
Figure 11. 20%-80% Rise Time vs Temperature
Figure 12. 20%-80% Fall Time vs Temperature
Rev 1.8
Page 4 of 15
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SiT2024B
Automotive AEC-Q100 SOT23 Oscillator
Performance Plots
[8]
1.8 V
2.0
1.9
1.8
1.7
0.8
2.5 V
2.8 V
3.0 V
3.3 V
1.0
0.9
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
IPJ (ps)
IPJ (ps)
10
20
30
40
50
60
70
80
90
100
110
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.7
0.6
0.5
0.4
0.3
10
20
30
40
50
60
70
80
90
100
110
Frequency (MHz)
Frequency (MHz)
Figure 13. RMS Integrated Phase Jitter Random
(12 kHz to 20 MHz) vs Frequency
[9]
Figure 14. RMS Integrated Phase Jitter Random
(900 kHz to 20 MHz) vs Frequency
[9]
Notes:
8. All plots are measured with 15 pF load at room temperature, unless otherwise stated.
9. Phase noise plots are measured with Agilent E5052B signal source analyzer. Integration range is up to 5 MHz for carrier frequencies below 40 MHz.
FPGA/CPLD
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