Rev. 1.3
_00
REAL-TIME CLOCK
S-3531A
S-3531A is a CMOS real-time clock IC supporting an I C-
BUS, which is designed to transfer or set each data of a
clock and calender as requested by a CPU. It provides
connection with a CPU via two wires and has two systems
of interrupt/alarm and clock output features, allowing the
alleviation of software treatment on the side of a host.
It also works on lower power with the oscillating circuit
operated at a constant voltage.
2
Features
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Applications
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Cellular phone
PHS
A variety of pagers
TV set and VCR
Camera
Package
DI
•
8-Pin SSOP (pin pitch : 0.65 mm) (Package drawing code : FS008-A)
•
Die
SC
ON
TI
NU
Low power consumption:
0.7
µA
typ. (V
DD
=3.0
V)
Wide area of operating voltage: 1.7 to 5.5 V
BCD input/output of year, month, day, day of a week, hour, minute and second
2
CPU interface via two wires (I C-BUS)
Auto calender till the year of 2,099
(automatic leap year arithmetic feature included)
Built-in power voltage detecting circuit
Built-in constant voltage circuit
Built-in flag generating circuit on power on/off
Built-in alarm interrupter (two systems)
Steady-state interrupt frequency/duty setting feature
Built-in 32 kHz crystal oscillating circuit (Internal Cd, External Cg)
Seiko Instruments Inc.
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1
REAL-TIME CLOCK
S-3531A
Block Diagram
Rev.1.3
_00
XIN
XOUT
Oscillating
circuit
Timing
generation
INT1 Register
Clock
generating
circuit
OD
UC
T
Hour
Day of
week
Compa-
rator 1
INT1
F32K
Second
Minute
Day
Month
Year
VDD
Constant
voltage
circuit
Status register
PR
2
Power
voltage
detecting
circuit
VSS
ED
Shift register
I C-BUS
Interface
SDA
SCL
DI
SC
2
ON
Seiko Instruments Inc.
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Figure 1
Rev.1.3
_00
Product Code Structure
S-3531AE
xx
−
TB
REAL-TIME CLOCK
S-3531A
IC direction in tape specifications
Package name (abbreviation)
FS : 8-Pin SSOP
CA : Die
Description (fixed)
DI
SC
ON
TI
NU
Seiko Instruments Inc.
ED
PR
OD
UC
T
3
REAL-TIME CLOCK
S-3531A
Pin Assignment
(1) Package: S-3531AEFS
8-Pin SSOP
Top view
INT1
XIN
XOUT
VSS
1
2
3
4
Figure 2
8
7
6
5
VDD
SDA
SCL
Rev.1.3
_00
(2) Die : S-3531AECA
Y
XIN
PR
0
INT1
OD
UC
T
F32K
VDD
SDA
X
SCL
F32K
X
890
890
890
890
Y
641
356
−240
−641
XOUT
S-3531A
VSS
Remark
Die size :
Pad size :
SC
X
ON
−890
−890
−890
−890
Symbol
INT1
XIN
TI
NU
Y
641
351
−114
−641
2.10
×
1.60 mm
Sizes shown are for design purposes only.
The corners of the die shrink by approximately 30
µm
after dicing.
100
×
100
µm
Pad Coordinates
Symbol
VDD
SDA
SCL
F32K
DI
XOUT
VSS
4
Seiko Instruments Inc.
ED
Figure 3
Rev.1.3
_00
Description of Pins
Pin No.
1
Symbol
INT1
Table 1
Description
Alarm interrupt 1 output pin.
Depending on the mode set by the INT1
REAL-TIME CLOCK
S-3531A
Configuration
Nch open drain output (No
protective diode on the
rewriting the status register.
2
3
4
5
XIN
XOUT
VSS
F32K
(Internal Cd, External Cg)
OD
UC
T
register and status register, it outputs low or side of VDD)
Clock when time is reached. It is disabled by
Crystal oscillator connect pin (32,768 Hz)
Negative power supply pin (GND)
−
−
Nch open drain output (No
32,768 Hz clock output pin.
This clock is always being output and cannot protective diode on the
CMOS input (No protective
Serial clock input pin.
Follow the specification with great care to the diode on the side of VDD)
rising/falling time of the SCL signal because
the signal is treated at its rising/falling edge.
Nch open drain output (No
Serial data input/output pin.
protective diode on the
This pin is usually pulled up to VDD via a
side of VDD)
resistor, and connected to other open-drain or
CMOS input
open-collector output devices in wired OR
configuration.
6
SCL
7
SDA
TI
NU
ED
PR
be controlled by command.
side of VDD)
8
VDD
Positive power supply pin.
−
DI
Seiko Instruments Inc.
SC
ON
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