AS2842/3/4/5
Features
Description
The AS2842 family of control ICs provide pin-for-pin replace-
ment of the industry standard UC3842 series of devices. The
devices are redesigned to provide significantly improved
tolerances in power supply manufacturing. The 2.5 V refer-
ence has been trimmed to 1.0% tolerance. The oscillator
discharge current is trimmed to provide guaranteed duty
cycle clamping rather than specified discharge current. The
circuit is more completely specified to guarantee all param-
eters impacting power supply manufacturing tolerances.
In addition, the oscillator and flip-flop sections have been
enhanced to provide additional performance. The R
T
/C
T
pin
now doubles as a synchronization input that can be easily
driven from open collector/open drain logic outputs. This
sync input is a high impedance input and can easily be used
for externally clocked systems. The new flip-flop topology
allows the duty cycle on the AS2844/5 to be guaranteed
between 49 and 50%. The AS2843/5 requires less than
0.5 mA of start-up current over the full temperature range.
Current Mode Controller
•
•
•
•
•
•
2.5 V bandgap reference
trimmed to 1.0% and
temperature-compensated
Extended temperature range
from - 40 to 105° C
AS2842/3 oscillations trimmed
for precision duty cycle clamp
AS2844/5 have exact 50% max
duty cycle clamp
Advanced oscillator design
simplifies synchronization
Improved specs on UVLO
and hysteresis provide
more predictable start-up
and shutdown
Improved 5 V regulator provides
better AC noise immunity
Guaranteed performance
with current sense pulled
below ground
Over-temperature shutdown
•
•
•
Ordering Information
Description
Temperature Range
Order Codes
8-Pin Plastic DIP
8-Pin Plastic SOIC
-40 to 105° C
-40 to 105° C
AS2842/3/4/5N
AS2842/3/4/5D-8
Pin Configuration
—
PDIP (N)
COMP
V
FB
I
SENSE
R
T
/C
T
1
2
3
4
Top view
8L SOIC (D)
8
7
6
5
V
REG
V
CC
OUT
GND
COMP
V
FB
I
SENSE
R
T
/C
T
1
2
3
4
8
7
6
5
V
REG
V
CC
OUT
GND
ASTEC Semiconductor
37
AS2842/3/4/5
Functional Block Diagram
1
COMP
+
2
V
FB
–
ERROR AMP
(1.0 V)
R
2R
(5.0 V)
Current Mode Controller
5V
REGULATOR
(2.5 V)
REF OK
(4 V)
UVLO
(4 V)
7
V
CC
(5.0 V)
8
V
REG
PWM
COMPARATOR
3
I
SENSE
(3.0 V)
–
–
S
+
R
FF
PWM LOGIC
6
OUT
(5 V)
CLK ÷ 2 [3844/45]
CLK [3842/43]
FF
S
FF
T
5
GND
(1.3 V)
(0.6 V)
Figure 1.
Block Diagram of the AS2842/3/4/5
Pin Function Description
Pin Number
Function
Description
1
2
3
4
COMP
V
FB
I
SENSE
R
T
/C
T
This pin is the error amplifier output. Typically used to provide loop compensation to
maintain V
FB
at 2.5 V.
Inverting input of the error amplifier. The non-inverting input is a trimmed 2.5 V
bandgap reference.
A voltage proportional to inductor current is connected to the input. The PWM uses
this information to terminate the gate drive of the output.
Oscillator frequency and maximum output duty cycle are set by connecting a resistor
(R
T
) to V
REG
and a capacitor (C
T
) to ground. Pulling this pin to ground or to V
REG
will
accomplish a synchronization function.
Circuit common ground, power ground, and IC substrate.
This output is designed to directly drive a power MOSFET switch. This output can sink
or source peak currents up to 1A. The output for the AS2844/5 switches at one-half the
oscillator frequency.
Positive supply voltage for the IC.
This 5 V regulated output provides charging current for the capacitor C
T
through the
resistor R
T
.
5
6
GND
OUT
7
8
V
CC
V
REG
ASTEC Semiconductor
+
4
R
T
/C
T
+
+
–
–
OSCILLATOR
OVER
TEMPERATURE
R
38
Current Mode Controller
Absolute Maximum Ratings
Parameter
Symbol
AS2842/3/4/5
Rating
Unit
Supply Voltage (I
CC
< 30 mA)
Supply Voltage (Low Impedance Source)
Output Current
Output Energy (Capacitive Load)
Analog Inputs (Pin 2, Pin 3)
Error Amp Sink Current
Maximum Power Dissipation
8L SOIC
8L PDIP
Maximum Junction Temperature
Storage Temperature Range
Lead Temperature, Soldering 10 Seconds
V
CC
V
CC
I
OUT
Self-Limiting
30
±1
5
– 0.3 to 30
10
V
V
A
µJ
V
mA
mW
mW
°C
°C
°C
P
D
750
1000
T
J
T
STG
T
L
150
– 65 to 150
300
Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Recommended Conditions
Parameter
Symbol
Rating
Unit
Typical Thermal Resistances
Package
θ
JA
θ
JC
Typical Derating
Supply Voltage
AS2842,4
AS2843,5
Oscillator
V
CC
15
10
f
OSC
50 to 500
V
V
kHz
8L PDIP
8L SOIC
95° C/W
175° C/W
50° C/W
45° C/W
10.5 mW/°C
5.7 mW/°C
ASTEC Semiconductor
39
AS2842/3/4/5
Electrical Characteristics
Current Mode Controller
Electrical characteristics are guaranteed over full junction temperature range (-40 to 105° C ). Ambient temperature must be derated based
on power dissipation and package thermal characteristics. The conditions are: V
CC
= 15 V R
T
= 10 kΩ, and C
T
= 3.3 nF, unless otherwise
,
stated. To override UVLO, V
CC
should be raised above 17 V prior to test.
Parameter
5 V Regulator
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
1
Total Output Variation
1
Long-term Stability
1
Output Noise Voltage
Short Circuit Current
2.5 V Internal Reference
Nominal Voltage
Line Regulation
Load Regulation
Temperature Stability
1
Total Output Variation
1
Long-term Stability
1
Oscillator
Initial Accuracy
Voltage Stability
Temperature Stability
1
Amplitude
Upper Trip Point
Lower Trip Point
Sync Threshold
Discharge Current
Duty Cycle Limit
TC
f
f
OSC
V
H
V
L
V
SYNC
I
D
R
T
= 680
Ω,
C
T
= 5.3 nF, T
J
= 25° C
400
7.5
46
f
OSC
T
J
= 25° C
12 V
≤
V
CC
≤
25 V
T
MIN
≤
T
J
≤
T
MAX
V
RT/CT
peak-to-peak
47
52
0.2
5
1.6
2.9
1.3
600
8.7
50
800
9.5
52
57
1
kHz
%
%
V
V
V
mV
mA
%
TC
VFB
Line, load, temperature
Over 1,000 hrs at 125° C
2.450
V
FB
PSRR
T = 25° C; I
REG
= 1 mA
12 V
≤
V
CC
≤
25 V
1
≤
I
REG
≤
20 mA
2.475
2.500
2
2
0.1
2.500
2
2.525
5
5
0.2
2.550
12
V
mV
mV
mV/°C
V
mV
V
NOISE
I
SC
TC
REG
Line, load, temperature
Over 1,000 hrs at 25° C
10 Hz
≤
f
≤
100 kHz, T
J
= 25° C
30
4.85
5
50
100
180
V
REG
PSRR
T
J
= 25° C, I
REG
= 1 mA
12
≤
V
CC
≤
25 V
1
≤
I
REG
≤
20 mA
4.95
5.00
2
2
0.2
5.05
10
10
0.4
5.15
25
V
mV
mV
mV/°C
V
mV
µV
mA
Symbol
Test Condition
Min
Typ
Max
Unit
ASTEC Semiconductor
40
Current Mode Controller
Electrical Characteristics
(cont’d)
AS2842/3/4/5
Electrical characteristics are guaranteed over full junction temperature range (-40 to 105° C ). Ambient temperature must be derated based
on power dissipation and package thermal characteristics. The conditions are: V
CC
= 15 V R
T
= 10 kΩ, and C
T
= 3.3 nF, unless otherwise stated.
,
To override UVLO, V
CC
should be raised above 17 V prior to test.
Parameter
Error Amplifier
Input Voltage
Input Bias Current
Voltage Gain
Transconductance
Unity Gain Bandwidth
1
Power Supply Rejection Ratio
Output Sink Current
Output Source Current
Output Swing High
Output Swing Low
Current Sense Comparator
Transfer Gain
2,3
I
SENSE
Level Shift
2
Maximum Input Signal
2
Power Supply Rejection Ratio
Input Bias Current
Propagation Delay to Output
1
Output
Output Low Level
V
OL
V
OL
Output High Level
V
OH
V
OH
Rise Time
1
Fall Time
1
Housekeeping
Start-up Threshold
V
CC
(on)
2842/4
2843/5
Minimum Operating Voltage
After Turn On
Output Low Level in UV State
Over-Temperature Shutdown
4
V
OUV
T
OT
V
CC
(min)
2842/4
2843/5
I
SINK
= 20 mA, V
CC
= 6 V
15
7.8
9
7.0
16
8.4
10
7.6
1.5
125
17
9.0
11
8.2
2.0
V
V
V
V
V
°C
t
R
t
F
I
SINK
= 20 mA
I
SINK
= 200 mA
I
SOURCE
= 20mA
I
SOURCE
= 200mA
C
L
= 1 nF
C
L
= 1 nF
13
12
0.1
1.5
13.5
13.5
50
50
150
150
0.4
2.2
V
V
V
V
ns
ns
PSRR
I
BIAS
t
PD
AV
CS
V
LS
–0.2
≤
V
SENSE
≤
0.8 V
V
SENSE
= 0 V
V
COMP
= 5 V
12
≤
V
CC
≤
25 V
0.9
2.85
3.0
1.5
1
70
–1
85
–10
150
1.1
3.15
V/V
V
V
dB
µA
ns
V
FB
I
BIAS
A
VOL
G
m
GBW
PSRR
I
COMPL
I
COMPH
V
COMPH
V
COMPL
12
≤
V
CC
≤
25 V
V
FB
= 2.7 V, V
COMP
= 1.1V
V
FB
= 2.3 V, V
COMP
= 5 V
V
FB
= 2.3 V, R
L
= 15 kΩ to Ground
V
FB
= 2.7 V, R
L
= 15 kΩ to Pin 8
0.8
60
2
0.5
5
2
≤
V
COMP
≤
4 V
65
T
J
= 25° C
2.475
2.50
– 0.1
90
1
1.2
70
6
0.8
5.5
0.7
1.1
2.525
–1
V
µA
dB
mA/mV
MHz
dB
mA
mA
V
V
Symbol
Test Condition
Min
Typ
Max
Unit
ASTEC Semiconductor
41
嵌入式系统
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