IS2020/21/23/25 SoC
Bluetooth
®
4.1 Stereo Audio SOC
Features
System Specification
Compliant with Bluetooth Specification v.4.1
(EDR) in 2.4 GHz ISM band
It supports following profiles :
- HFP 1.6
- HSP 1.1
- A2DP 1.2
- AVRCP 1.5
- SPP 1.0
- PBAP 1.0
Baseband Hardware
16MHz main clock input
Built-in internal ROM for program memory
Support to connect to two hosts ( phones,
tablets…) with HFP or A2DP profiles
simultaneously
Adaptive Frequency Hopping (AFH) avoids
occupied RF channels
Fast Connection supported
RF Hardware
Fully Bluetooth 4.1 (EDR) system in 2.4 GHz
ISM band.
Combined TX/RX RF terminal simplifies
external matching and reduces external
antenna switches.
Max. +4dBm output power with 20 dB level
control from register control.
Built-in T/R switch for Class 2/3 application
To avoid temperature variation, temperature
sensor with temperature calibration is utilized
into bias current and gain control.
Fully integrated synthesizer has been created.
There requires no external VCO, varactor
diode, resonator and loop filter.
Crystal oscillation with built-in digital trimming
for temperature/process variations.
Audio processor
Support 64 kb/s A-Law or
-Law
PCM format,
or CVSD (Continuous Variable Slope Delta
Modulation) for SCO channel operation.
Noise suppression
Echo suppression
SBC and optional AAC decoding
Packet loss concealment
Build-in four languages (Chinese/ English/
Spanish/ French) voice prompts and 20 events
for each one (This function can be set up in
“IS20XXS_UI” tool.)
Support SCMS-T
Audio Codec
20 bit DAC and 16 bit ADC codec
98dB SNR DAC playback
Built-in 2 channel 2.3W class-D amplifier for a
4Ω speaker (for IS2025S only)
Peripherals
Built-in Lithium-ion battery charger (up to
350mA)
Integrate 3V, 1.8V configurable switching
regulator and LDO
Built-in ADC for battery monitor and voltage
sense.
A line-in port for external audio input
Two LED drivers
Flexible HCI interface
High speed HCI-UART (Universal
Asynchronous Receiver Transmitter) interface
(up to 921600bps)
Package
5x6.5mm
2
48QFN package (IS2021S)
7x7mm
2
56QFN package (IS2020S, IS2023S)
8x8mm
2
68QFN package (IS2025S)
Description
Stereo Audio Chip is a compact, highly
integrated, CMOS single-chip RF and
baseband IC for Bluetooth v4.1 with Enhanced
Data Rate 2.4GHz applications. This chip is
fully compliant with Bluetooth specification and
completely backward-compatible with Bluetooth
3.0, 2.0 or 1.2 systems.
It incorporates Bluetooth 1M/2M/3Mbps RF,
single-cycle 8bit MCU, TX/RX modem, 5-port
memory controller, task/hopping controller,
Page 1
Stereo Audio SoC
UART interface, and MICROCHIP’s own
Bluetooth software stack to achieve the
required BT v4.1 with EDR functions.
To provide the superior audio and voice
quality, it also integrates a DSP co-processor, a
PLL, and a CODEC dedicated for voice and
audio applications.
For voice, not only basic CVSD encoding and
decoding but also enhanced noise reduction
and echo cancellation are implemented by the
built-in DSP to achieve better quality in both
sending and receiving sides. For the enhanced
audio applications, SBC/AAC_LC decoding
functions can be also carried out by DSP to
satisfy Bluetooth A2DP requirements.
In addition, to minimize the external
components required for portable devices, a
battery voltage sensor, battery charger, a
switching regulator and LDO are integrated to
reduce system BOM cost for various Bluetooth
applications.
As the market of portable/wireless speakers
demand is increasing, a stereo 2 channels
2.3W class-D amplifier which provides up to
100dB SNR is also built-in to reduce BOM cost
and PCB area.
Applications
Stereo headsets
Portable speakerphones
Page 2
Stereo Audio SoC
Table of Contents
1.0 DEVICE OVERVIEW ................................................................................................................................... 4
2.0 KEY FEATURES TABLE.............................................................................................................................. 5
3.0 PIN DESCRIPTION AND POWER SUPPLY ............................................................................................... 6
4.0 TRANSCEIVER .......................................................................................................................................... 19
5.0 MICROPROCESSOR ................................................................................................................................ 20
6.0 AUDIO ........................................................................................................................................................ 21
7.0 POWER MANAGEMENT UNIT.................................................................................................................. 23
8.0 GENERAL PURPOSE IOs ......................................................................................................................... 25
9.0 OPERATION WITH EXTERNAL MCU ....................................................................................................... 26
10.0 I
2
S APPLICATION .................................................................................................................................... 31
11.0 ANTENNA PLACEMENT RULE .............................................................................................................. 33
12.0 SPECIFICATIONS ................................................................................................................................... 34
13.0 REFERENCE CIRCUIT............................................................................................................................ 41
14.0 PACKAGE INFORMATION ...................................................................................................................... 46
15.0 REFLOW PROFILE AND STORAGE CINDITION ................................................................................... 54
Abbreviations List:
HFP:
Hands-free Profile
AVRCP:
Audio Video Remote Control Profile
A2DP:
Advanced Audio Distribution Profile
PBAP:
Phone Book Access Profile
HSP:
Headset Profile
SPP:
Serial Port Profile
NFC:
Near Field Communication
CDA:
Class D Amplifier
SCMS-T:
Serial Copy Management System
Page 3
Stereo Audio SoC
1.0 DEVICE OVERVIEW
The stereo audio chip series include IS2020S, IS2021S, IS2023S, and IS2025S chip. The chip integrates
Bluetooth 4.1 radio transceiver, PMU, DSP and 2-channel CDA (Class D Amplifier). Figure 1-1 shows the
application block diagram.
FIGURE 1-1: APPLICATION BLOCK DIAGRAM
Antenna
IS20XX
Speaker
2W
Stereo Class-D
AMP
DSP
24-bit DSP Core
BTv4.1+EDR
Transceiver
Classic RF
16 M Hz
Crystal
EXT DSP
I
2
S
(Digital signal for IS2023S only)
158KB ROM
Audio Codec
Digital Core
MCU
2-Channel DAC
8051
44KB RAM
2-Channel ADC
448KB ROM
16KB patch RAM
88KB RAM
RF Controller
MAC
MODEM
Speaker
PMU
BAT Charger
Power Switch
1.8V BUCK
3.0V LDO*2
Li-Ion
BAT
MIC1
MIC2
(For IS2020/2025 only)
AUX_IN
(analog signal)
IO Port 0~3
I2C
(GPIOs or H/W)
LED Driver *2
LED
EEPROM
FIGURE 1-2: INTERFACE BETWEEN MCU AND IS20XX CHIP
MCU_
WAKEUP
UART_RX
P0_0
HCI_TXD
MCU
UART_TX
BT_
WAKEUP
IS20XXS
HCI_RXD
PWR
Page 4
Stereo Audio SoC
2.0 KEY FEATURES TABLE
Feature
Application
Stereo/Mono
Pin count
Dimension (mm
2
)
Audio DAC output
DAC (single-end) SNR@2.8V (dB)
DAC (cap-less) SNR@2.8V (dB)
ADC SNR @2.8V (dB)
I
2
S digital interface
Analog Aux- in
Mono MIC
Support external audio AMP
Build-in Class-D amplifier
UART
LED Driver
Internal DC-DC step-down
regulator
DC 5V Adaptor Input
Battery Charger (350mA max)
IO Pin for Application
Button support
Support NFC application
Voice prompt
Multi-tone
Internal DSP sound effect
Profile
HFP
AVRCP
A2DP
PBAP
HSP
SPP
Build-in EEPROM
Note: “
” means support the feature.
1.6
1.5
1.2
1.0
1.1
1.0
X
1.6
1.5
1.2
1.0
1.1
1.0
1.6
1.5
1.2
1.0
1.1
1.0
X
1.6
1.5
1.2
1.0
1.1
1.0
X
Chip
IS2020S
Headset /
Speaker
Stereo
56
7X7
2-ch
-98
-96
-90
X
IS2021S
Headset
Stereo
48
5X6.5
2-ch
-98
-96
-90
X
X
1
X
X
IS2023S
I
2
S Speaker
Stereo
56
7X7
X
X
X
-90
IS2025S
Speaker
Stereo
68
8X8
2-ch
-98
-96
-90
X
1
X
X
2
2
X
2-ch
2
2
2
2
9
6
8
6
X
6
10
6
X
(128k)
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微控制器 MCU
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