High Speed Super Low Power SRAM
256k Word By 8 bit
CS18LV20483
DESCRIPTION
The CS18LV20483 is a high performance, high speed, low power CMOS Static
Random Access Memory organized as 262,144 words by 8 bits and operates from a wide
range of 2.7 to 3.6V supply voltage. Advanced CMOS technology and circuit techniques
provide both high speed and low power features with a typical CMOS standby current of
0.15uA and maximum access time of 55/70ns in 3.0V operation. Easy memory expansion
is provided by an active LOW chip enable (/CE) and active LOW output enable (/OE) and
three-state output drivers.
The CS18LV20483 has an automatic power down feature, reducing the power
consumption significantly when chip is deselected. The CS18LV20483 is available in
JEDEC standard TSOP (I) (8x20mm), TSOP (II) (400 mil), SOP (450 mil), STSOP (8x13.4
mm) and 36-pin CSP 6x8mm package..
FEATURES
Low operation voltage : 2.7 ~ 3.6V
Ultra low power consumption :
(Vcc = 3.0V)
2.5mA＠1MHz (Max.) operating current
0.15uA (Typ.) CMOS standby current
High speed access time : 55~70ns (Max.) at Vcc = 3.0V.
Automatic power down when chip is deselected.
Three state outputs and TTL compatible.
Fully static operation.
Data retention supply voltage as low as 1.5V.
Easy expansion with /CE, CE2 and /OE options.
Copyright
2004 March Chiplus Semiconductor Corp. All rights reserved
Rev. 0.5
P1
High Speed Super Low Power SRAM
256k Word By 8 bit
CS18LV20483
Standby (Typ.)
Package Type
32 SOP
Product Family
Part No.
CS18LV20483CC
CS18LV20483DC
CS18LV20483EC
CS18LV20483FC
CS18LV20483KC
Part No.
CS18LV20483CI
CS18LV20483DI
CS18LV20483EI
CS18LV20483FI
CS18LV20483KI
Note: Green package part no, sees order information.
-40~85
o
C
2.7~3.6
55/70
0.30 uA
(Vcc= 3.3V)
Operating Temp Vcc. Range Speed (ns)
Standby (Typ.)
0~70
o
C
2.7~3.6
55/70
0.15 uA
(Vcc = 3.3V)
Operating Temp Vcc. Range Speed (ns)
32 STSOP
32 TSOP (I)
32 TSOP (II)
36 CSP -0608
Package Type
32 SOP
32 STSOP
32 TSOP (I)
32 TSOP (II)
36 CSP-0608
PIN CONFIGURATIONS
32 STSOP 8x13.4mm
32 TSOP(I) 8x20mm
32 SOP 450 mil
32 TSOP(II) 400 mil
Copyright
2004 March Chiplus Semiconductor Corp. All rights reserved
Rev. 0.5
P2
High Speed Super Low Power SRAM
256k Word By 8 bit
CS18LV20483
36 BGA 6x8 mm
BLOCK DIAGRAM
Copyright
2004 March Chiplus Semiconductor Corp. All rights reserved
Rev. 0.5
P3
High Speed Super Low Power SRAM
256k Word By 8 bit
CS18LV20483
Function
PIN DESCRIPTIONS
Name
A0-A17
Address Input
/CE
Chip Enable Input,
CE2
Chip Enable 2 Input
/WE
Write Enable Input
These 18 address inputs select one of the 262,144 x 8-bit words
in the RAM.
/CE is active LOW and CE2 is active HIGH. Both chip enables
must be active when data read from or write to the device. If
either chip enable is not active, the device is deselected and is
in a standby power mode. The DQ pins will be in the high
impedance state when the device is deselected.
The write enable input is active LOW and controls read and
write operations. With the chip selected, when /WE is HIGH and
/OE is LOW, output data will be present on the DQ pins; when
/WE is LOW, the data present on the DQ pins will be written into
the selected memory location.
The output enable input is active LOW. If the output enable is
active while the chip is selected and the write enable is inactive,
data will be present on the DQ pins and they will be enabled.
The DQ pins will be in the high impedance state when /OE is
inactive.
DQ0-DQ7
Data Input/Output
Ports
Vcc
Gnd
These 8 bi-directional ports are used to read data from or write
data into the RAM.
Power Supply
Ground
/OE
Output Enable Input
Copyright
2004 March Chiplus Semiconductor Corp. All rights reserved
Rev. 0.5
P4
High Speed Super Low Power SRAM
256k Word By 8 bit
CS18LV20483
/OE
X
X
H
L
X
DQ0~7
High Z
High Z
D
OUT
D
IN
Vcc Current
I
CCSB
, I
CCSB1
I
CC
I
CC
I
CC
TRUTH TABLE
MODE
Not Selected
Output
Disabled
Read
Write
/CE
H
X
L
L
L
CE2
X
L
H
H
H
/WE
X
X
H
H
L
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
V
TERM
T
BIAS
T
STG
P
T
I
OUT
Parameter
Terminal Voltage with Respect to GND
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current
Rating
-0.5 to Vcc+0.5
-40 to +125
-60 to +150
1.0
20
Unit
V
O
C
C
O
W
mA
Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
Copyright
2004 March Chiplus Semiconductor Corp. All rights reserved
Rev. 0.5
P5
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