Freescale Semiconductor
Advance Information
Document number: MC34712
Rev. 4.0, 5/2007
3.0 A 1.0 MHz Fully Integrated
DDR Switch-Mode Power
Supply
The 34712 is a highly integrated, space efficient, low cost, single
synchronous buck switching regulator with integrated N-channel
power MOSFETs. It is a high performance point-of-load (PoL) power
supply with the ability to track an external reference voltage.
Its high efficient 3.0 A sink and source capability combined with its
voltage tracking/sequencing ability and tight output regulation, makes
it ideal to provide the termination voltage (V
TT
) for modern data buses
such as Double-Data-Rate (DDR) memory buses. It also provides a
buffered output reference voltage (V
REF
) to the memory chipset
The 34712 offers the designer the flexibility of many control,
supervisory, and protection functions to allow for easy implementation
of complex designs. It is housed in a Pb-Free, thermally enhanced,
and space efficient 24-Pin Exposed Pad QFN.
Features
• 45 m
Ω
Integrated N-Channel Power MOSFETs
• Input Voltage Operating Range from 3.0 V to 6.0 V
•
±
1 % Accurate Output Voltage, Ranging from 0.7 V to 1.35 V
•
±
1 % Accurate Buffered Reference Output Voltage
• Programmable Switching Frequency Range from 200 kHz to
1.0 MHz with a default of 1.0 MHz
• Over Current Limit and Short Circuit Protection
• Thermal Shutdown
• Output Overvoltage and Undervoltage Detection
• Active Low Power Good Output Signal
• Active Low Standby and Shutdown Inputs
• Pb-Free Packaging Designated by Suffix Code EP.
V
IN
(3.0V TO 6.0V)
34712
SWITCH-MODE POWER SUPPLY
EP SUFFIX
98ARL10577D
24-PIN QFN
ORDERING INFORMATION
Device
MC34712EP/R2
Temperature
Range (T
A
)
-40 to 85°C
Package
24 QFN
34712
PVIN
V
DDQ
VREFIN
SW
VIN
VDDI
FREQ
GND
SD
VOUT
V
DDQ
MEMORY
BUS
BOOT
V
TT
TERMINATING
RESISTORS
INV
COMP
VREFOUT
PGND
PG
V
IN
DDR MEMORY
CHIPSET
V
REF
DDR MEMORY
CONTROLER
V
DDQ
MCU
STBY
Figure 1. 34712 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
STBY
Thermal
Monitoring
PG
M1
I
se nse
System
Reset
Current
Monitoring Discharge
I
li mit
SD
Internal
Voltage
Regulator
VIN
System
Control
VDDI
M2
BOOT
VIN
VBOOT
PVIN
M3
SW
Oscillator
FREQ
Prog. Frequency
Buck
Cntl.
Logic
FSW
Gate
Driver
I
sense
M4
V DDI
VDDI
Bandgap
Regulator
VREFIN
RREF1
RREF2
Buffer
M6
Discharge
M5
Discharge
VOUT
V BG
PWM
Comparator
Error
Amplifier
INV
PGND
COMP
Ramp
Generator
GND
VREFOUT
Figure 2. 34712 Simplified Internal Block Diagram
34712
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
PIN CONNECTIONS
PIN CONNECTIONS
BOOT
VDDI
PVIN
24
GND
FREQ
NC
PG
STBY
SD
23
22
21
20
19
18
PVIN
17
SW
SW
SW
1
2
3
4
5
6
7
VREFIN
Transparent
Top View
PVIN
VIN
VIN
16
15
14
PGND
13
8
VREFOUT
PGND
9
COMP
10
INV
11
VOUT
12
PGND
Figure 3. 34712 Pin Connections
Table 1. 34712 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on
page 10.
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12,13,14
15,16,17
18,19,20
21
Pin Name
GND
FREQ
NC
PG
STBY
SD
Pin Function
Ground
Passive
None
Output
Input
Input
Input
Output
Passive
Input
Output
Ground
Power
Supply
Passive
Formal Name
Signal Ground
Analog signal ground of IC
Definition
Frequency Adjustment Buck converter switching frequency adjustment pin
No Connect
Power Good
Standby
Shutdown
Voltage-Tracking-
Reference Input
Reference Voltage
Output
Compensation
Error Amplifier
Inverting Input
Output Voltage
Discharge FET
Power Ground
Switching Node
Power-Circuit Supply
Input
Bootstrap
No internal connections to this pin
Active-low (open drain) power-good status reporting pin
Standby mode input control pin
Shutdown mode input control pin
Voltage-Tracking-Reference voltage input
Buffered output equal to 1/2 of voltage-tracking reference
Buck converter external compensation network pin
Buck converter error amplifier inverting input pin
Discharge FET drain connection (connect to buck converter output
capacitors)
Ground return for buck converter and discharge FET
Buck converter power switching node
Buck converter main supply voltage input
Bootstrap switching node (connect to bootstrap capacitor)
VREFIN
VREFOUT
COMP
INV
VOUT
PGND
SW
PVIN
BOOT
34712
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
PIN CONNECTIONS
Table 1. 34712 Pin Definitions (continued)
A functional description of each pin can be found in the Functional Pin Description section beginning on
page 10.
Pin Number
22,23
24
Pin Name
VIN
Pin Function
Supply
Passive
Formal Name
Logic-Circuit Supply
Input
Internal Voltage
Regulator
Definition
Logic circuits supply voltage input
Internal Vdd Regulator (connect filter capacitor to this pin)
VDDI
34712
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Ratings
ELECTRICAL RATINGS
Input Supply Voltage (VIN) Pin
High-Side MOSFET Drain Voltage (PVIN) Pin
Switching Node (SW) Pin
BOOT Pin (Referenced to SW Pin)
PG, VOUT, SD, and STBY Pins
VDDI, FREQ, INV, COMP, VREFIN, and VREFOUT Pins
Continuous Output Current
(1)
ESD Voltage
(2)
Human Body Model
Device Charge Model (CDM)
THERMAL RATINGS
Operating Ambient Temperature
(3)
Storage Temperature
Peak Package Reflow Temperature During Reflow
(4), (5)
Maximum Junction Temperature
Power Dissipation (T
A
= 85 °C)
(6)
Notes
1. Continuous output current capability so long as T
J
is
≤
T
J(MAX)
.
2.
3.
4.
5.
ESD1 testing is performed in accordance with the Human Body Model (C
ZAP
= 100 pF, R
ZAP
= 1500
Ω),
ESD3 testing is performed in
accordance with the Charge Device Model (CDM).
The limiting factor is junction temperature, taking into account power dissipation, thermal resistance, and heatsinking.
Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL),
Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e.
MC33xxxD enter 33xxx), and review parametrics.
Maximum power dissipation at indicated ambient temperature.
T
A
T
STG
T
PPRT
T
J(MAX)
P
D
-40 to 85
-65 to +150
Note 5
+150
2.9
°C
°C
°C
°C
W
V
ESD1
V
ESD3
±2000
±750
V
V
IN
PV
IN
V
SW
V
BOOT
- V
SW
-
-
I
OUT
-0.3 to 7.0
-0.3 to 7.0
-0.3 to 7.5
-0.3 to 7.5
-0.3 to 7.0
-0.3 to 3.0
±3.0
V
V
V
V
V
V
A
Symbol
Value
Unit
6.
34712
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
stm32/stm8
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