Very low Jitter and Phase Noise (< 40ps Pk-Pk typical)
Up to 3 outputs
Output frequency up to 200MHz CMOS.
Crystal inputs:
o
Fundamental crystal: 10MHz-30MHz
o
3
RD
overtone crystal: Up to 75MHz
Accepts <1.0V reference signal input voltage
One programmable I/O pin can be configured as
Output Enable (OE), or Frequency Selection input
(FSEL), or Reference clock.
Single 2.5V or 3.3V ± 10% power supply
Operating temperature range from -40°C to 85°C
Available in 8-pin MSOP/SOIC, 6-pin SOT Green/
RoHS compliant packages, or Die
PIN CONFIGURATION
XIN/FIN
GND
CLK0
CLK1
1
8
XOUT
CLK2,OE,FSEL
NC
VDD
PL611-20
PL611-20
SOP-8
MSOP-8
1
2
3
6
5
4
2
3
4
7
6
5
CLK1
GND
XIN/FIN
VDD
CLK2,OE,FSEL
XOUT
SOT-23
PL611-20
PL611-20
DESCRIPTION
The PL611-20 is a low-cost general purpose frequency synthesizer and a member of PhaseLink’s Factory
Programmable ‘Quick Turn Clock (QTC)’ family. PhaseLink’s PL611-20 product family can generate any output
frequency up to 200 MHz from fundamental crystal input between 10 MHz - 30 MHz, or a 3rd overtone crystal of
up to 75Mhz.
BLOCK DIAGRAM
XIN/FIN
XOUT
Xtal
OSC
FRef
R-counter
(8-bit)
Phase
Detector
M -counter
(10-bit)
Charge
Pump
Loop
Filter
Programming
Logic
FSEL
OE
CLoad
F
VCO
= F
Ref.
* (2 * M /R)
P-counter
(5-bit)
VCO
F
Out
= F
VCO
/ (2 * P)
CLK [0:1]
CLK2, OE, FSEL
Programmable Function
/1, /2
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
Rev 07/06/05 Page 1
PL611-20
Programmable Quick Turn Clock
T M
KEY PROGRAMMING PARAMETERS
CLK[ 0:2 ]
Output Frequency
Fout = FIN * M / (R * P) where
M=10 bit
R = 8 bit
P = 5 bit
1. CLK[0:1] = VCO / 2 * P
2. CLK0 = ~ CLK1
2. CLK[2]= FIN or FIN/2
Output Drive
Strength
Std: 10mA
(default)
High: 24mA
Crystal Load
+/- 200ppm
tuning.
Programmable
Input/Output (pin #7)
One output pin can be
configured as
1. CLK2 = FIN or FIN/2
2. FSEL - input
3. OE - input
Charge-Pump
Current
4 levels of pump
current setting
PIN DESCRIPTION
Name
XIN/FIN
GND
CLK[0:1]
VDD
DNC
Pin #
(M)SOP-8
1
2
3,4
5
6
SOT-23
3
2
1
6
-
Type
I
P
O
P
-
Description
Crystal or Reference input pin
GND connection
Programmable Clock Output [note:CLK0=CLK1]
VDD connection (2.25~3.63V)
Do No Connect
This programmable I/O pin can be configured as CLK2
(FIN
or FIN/2)
output, or OE input, or Frequency
Selection (FSEL) input pin. This pin has an internal 60KΩ
pull up resistor.
State
0
1 (default)
OE
Tristate
CLK[0:1]
Normal
mode
FSEL
Select Freq. ‘1’
Select Freq. ‘2’
CLK2, OE, FSEL
7
5
B
XOUT
8
4
O
Crystal output pin
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
Rev 07/06/05 Page 2
PL611-20
Programmable Quick Turn Clock
T M
DIE SPECIFICATION
Name
Size
Reverse side
Pad Opening
Die Thickness
Value
31.5x55.1 mil
GND
80 micron x 80 micron
10 mil
PAD LAYOUT AND DIE ID
XIN
GND
GND
CLK0
CLK1
1
2
3
7
4
5
6
VDD
VDD
9
8
XOUT
CLK2, OE, FSEL
Note: CLK0=CLK1
PAD ASSIGNMENT and DESCRIPTION
Name
XIN
GND
CLK0
CLK1
VDD
VDD
Pad #
1
2
3
4
5
6
7
Die Pads
X (µm)
101.5
101.5
101.5
101.5
101.5
697
697
Y(µm)
1274.0
1075.0
878.4
671.8
425.0
483.0
790.0
Type
I
P
O
O
P
Crystal input.
GND connection.
Description
Optional same frequency clock output (CLK0=CLK1). If the
clock output is not used, the pad should remain as ‘Do Not
Connect (DNC).
Programmable Clock Output.
VDD connection.
This programmable I/O pin can be configured as CLK2
(FIN
or FIN/2)
output, or OE input, or Frequency
Selection (FSEL) input pin. This pin has an internal
60KΩ pull up resistor.
State
0
1 (default)
OE
Tristate
CLK[0:1]
Normal
mode
FSEL
Select Freq. ‘1’
Select Freq. ‘2’
CLK2, OE, FSEL
8
697
1024.0
O
XOUT
9
697
1274.0
O
Crystal output.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
Rev 07/06/05 Page 3
PL611-20
Programmable Quick Turn Clock
T M
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
Supply Voltage Range
Input Voltage Range
Output Voltage Range
Data Retention @ 85º C
Soldering Temperature (Green Package)
Storage Temperature
Ambient Operating Temperature*
T
S
-65
-40
SYMBOL
V
DD
V
I
V
O
MIN.
MAX.
4.6
V
DD
+
0.5
V
DD
+
0.5
UNITS
V
V
V
Years
-
0.5
-
0.5
-
0.5
10
260
150
+85
°C
°C
°C
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device
and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above
the operational limits noted in this specification is not implied.
AC SPECIFICATIONS
PARAMETERS
Crystal Input Frequency
CONDITIONS
Fundamental Crystal
3
rd
Overtone Crystal
MIN.
10
TYP.
MAX.
30
75
10
UNITS
MHz
MHz
ms
ppm
ns
ns
ns
ns
%
ps
Settling Time
VDD Sensitivity
Output Rise Time
At power-up (after VDD increases over
1.62V)
Frequency vs. VDD+/-10%
15pF Load, 10/90%VDD, Standard drive
15pF Load, 10/90%VDD, High drive
15pF Load, 90/10%VDD, Standard drive
15pF Load, 90/10%VDD, High drive
At VDD/2
Equal loading (15 pF). Equal frequency
& drive strength
With capacitive decoupling between VDD
and GND. Operating only one output.
40
45
-2
2.5
1.0
2.5
1.0
50
2
3.5
1.5
3.5
1.5
55
200
Output Fall Time
Duty Cycle
Max. output skew between
same frequency clocks
Period Jitter, peak-to-peak*
(measured from 10,000
samples)
ps
* Note: Jitter performance depends on the programming parameters.
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
Rev 07/06/05 Page 4
PL611-20
Programmable Quick Turn Clock
T M
DC SPECIFICATIONS
PARAMETERS
Supply Current, Dynamic,
with Loaded Outputs
Operating Voltage
Output Low Voltage
Output High Voltage
Output Current
Short-circuit Current
SYMBOL
I
DD
V
DD
V
OL
V
OH
I
OSD
I
OHD
I
S
CONDITIONS
At 10MHz, load=15pF
MIN.
TYP.
MAX.
15
UNITS
mA
V
V
V
2.25
I
OL
= +4mA (Standard drive)
I
OH
= -4mA (Standard drive)
V
OL
= 0.4V, V
OH
= 2.4V (Standard
drive)
V
OL
= 0.4V, V
OH
= 2.4V (High Drive)
V
DD
– 0.4
10
24
±50
3.63
0.4
mA
mA
mA
CRYSTAL SPECIFICATIONS
PARAMETERS
Fundamental Crystal Resonator Frequency
3
rd
Overtone Crystal Resonator Frequency
Crystal Loading Rating
(The IC can be programmed for any value in this range.)
Maximum Sustainable Drive Level
Operating Drive Level
Crystal Shunt Capacitance
Effective Series Resistance, Fundamental, 10-30MHz
Effective Series Resistance, 3
rd
Overtone, 30-50MHz
[CO< 4pF, C
L
=5pF/8pF]
Effective Series Resistance, 3
rd
Overtone, 50-65MHz,
[CO< 4pF, C
L
=5pF/8pF]
Effective Series Resistance, 3
rd
Overtone, 65-75MHz
[CO< 4pF, C
L
=5pF/8pF
Note:
A detailed crystal specification document is also available for this part
SYMBOL
F
XIN
F
XIN
C
L (xtal)
MIN.
10
TYP.
MAX.
30
75
UNITS
MHz
MHz
pF
µW
µW
5
20
500
100
C0
R
S
ESR
ESR
ESR
6
30
100/70
60/40
45/30
pF
Ω
Ω
Ω
Ω
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
微控制器 MCU
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
