LT4250L/LT4250H
Negative 48V
Hot Swap Controller
FEATURES
s
s
DESCRIPTIO
s
s
s
s
s
s
s
Allows Safe Board Insertion and Removal
from a Live – 48V Backplane
Circuit Breaker Immunity to Voltage Steps and
Current Spikes
Programmable Inrush and
Short-Circuit Current Limits
Pin Compatible with LT1640L/LT1640H
Operates from –20V to – 80V
Programmable Overvoltage Protection
Programmable Undervoltage Lockout
Power Good Control Output
Bell-Core Compatible ON/OFF Threshold
APPLICATIO S
s
s
s
The LT
®
4250L/LT4250H are 8-pin, negative 48V Hot Swap
TM
controllers that allow a board to be safely inserted and
removed from a live backplane. Inrush current is limited to
a programmable value by controlling the gate voltage of an
external N-channel pass transistor. The pass transistor is
turned off if the input voltage is less than the program-
mable undervoltage threshold or greater than the over-
voltage threshold. A programmable current limit protects
the system against shorts. After a 500µs timeout the
current limit activates the electronic circuit breaker. The
PWRGD (LT4250L) or PWRGD (LT4250H) signal can be
used to directly enable a power module. The LT4250L is
designed for modules with a low enable input and the
LT4250H for modules with a high enable input.
The LT4250L/LT4250H are available in 8-pin PDIP and SO
packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Hot Swap is a trademark of Linear Technology Corporation.
Central Office Switching
– 48V Distributed Power Systems
Negative Power Supply Control
TYPICAL APPLICATIO
–48V RTN
(SHORT PIN)
–48V RTN
R4
†
549k
1%
3
R5
†
6.49k
1%
R6
†
10k
1%
UV
8
V
DD
1
UV =
38.5V
UV
RELEASE
AT 43V
OV =
71V
LT4250L
2
OV
V
EE
4
SENSE
5
GATE
6
R3
†
1k, 5%
PWRGD
DRAIN
7
V
EE
AND
DRAIN
20V/DIV
*
–48V
INPUT 1
0.1µF
10V
R1
0.02Ω
5%
†
C1
†
470nF
25V
R2
10Ω
5%
C2
†
15nF
100V
2
ON/OFF
9
V
OUT+
8
SENSE
+
7
TRIM
6
SENSE
–
4
5
V
OUT–
V
IN–
1
V
IN+
LUCENT
JW050A1-E
I
D
(Q1)
5A/DIV
Q1
IRF530
–48V
INPUT 2
* DIODES INC. SMAT70A
†
THESE COMPONENTS ARE APPLICATION
SPECIFIC AND MUST BE SELECTED BASED
UPON OPERATING CONDITIONS AND DESIRED
PERFORMANCE. SEE APPLICATIONS
INFORMATION.
C3
0.1µF
100V
5V
+
C4
100µF
100V
+
C5
100µF
16V
4250 TA01
U
Voltage Step On Input Supply
500µs/DIV
4250lhf
U
U
1
LT4250L/LT4250H
ABSOLUTE
MAXIMUM
RATINGS
U
W W
U
W
(Note 1), All Voltages Referred to V
EE
Supply Voltage (V
DD
– V
EE
) .................... – 0.3V to 100V
PWRGD, PWRGD Pins ........................... – 0.3V to 100V
SENSE, GATE Pins .................................... – 0.3V to 20V
UV, OV Pins .............................................. – 0.3V to 60V
DRAIN Pin .................................................. –2V to 100V
Maximum Junction Temperature ......................... 125°C
Operating Temperature Range
LT4250LC/LT4250HC ............................. 0°C to 70°C
LT4250LI/LT4250HI .......................... – 40°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
PWRGD 1
OV 2
UV 3
V
EE
4
N8 PACKAGE
8-LEAD PDIP
8
7
6
5
V
DD
DRAIN
GATE
SENSE
ORDER PART
NUMBER
LT4250LCN8
LT4250LCS8
LT4250LIN8
LT4250LIS8
S8 PART MARKING
4250L
4250LI
PWRGD 1
OV 2
UV 3
V
EE
4
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX
= 125°C,
θ
JA
= 120°C/W (N8)
T
JMAX
= 125°C,
θ
JA
= 150°C/W (S8)
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 2), V
DD
= 48V, V
EE
= 0V unless otherwise noted.
SYMBOL
DC
V
DD
I
DD
V
UVL
V
CL
I
PU
I
PD
I
SENSE
∆V
GATE
V
UVH
V
UVL
V
UVHY
I
INUV
V
OVH
V
OVL
Supply Voltage Operating Range
Supply Current
Undervoltage Lockout
Current Limit Trip Voltage
GATE Pin Pull-Up Current
GATE Pin Pull-Down Current
SENSE Pin Current
External Gate Drive
UV Pin High Threshold Voltage
UV Pin Low Threshold Voltage
UV Pin Hysteresis
UV Pin Input Current
OV Pin High Threshold Voltage
OV Pin Low Threshold Voltage
V
UV
= V
EE
OV Increasing
OV Decreasing
q
q
q
q
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
UV = 3V, OV = V
EE
, SENSE = V
EE
V
CL
= (V
SENSE
– V
EE
)
Gate Drive On, V
GATE
= V
EE
Gate Drive OFF
V
SENSE
= 50mV
(V
GATE
– V
EE
), 20V
≤
V
DD
≤
80V
UV Increasing
UV Decreasing
2
U
TOP VIEW
8
7
6
5
V
DD
DRAIN
GATE
SENSE
W
ORDER PART
NUMBER
LT4250HCN8
LT4250HCS8
LT4250HIN8
LT4250HIS8
S8 PART MARKING
4250H
4250HI
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX
= 125°C,
θ
JA
= 120°C/W (N8)
T
JMAX
= 125°C,
θ
JA
= 150°C/W (S8)
MIN
20
TYP
MAX
80
UNITS
V
mA
V
mV
µA
mA
µA
V
V
V
mV
µA
V
V
q
q
q
q
1.6
15.4
40
– 30
24
50
– 45
50
– 20
13.5
1.255
1.125
130
– 0.02
1.235
1.210
1.255
1.235
5
60
– 60
70
18
1.270
1.145
– 0.5
1.275
1.255
q
q
q
10
1.240
1.105
4250lhf
LT4250L/LT4250H
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 2), V
DD
= 48V, V
EE
= 0V unless otherwise noted.
SYMBOL
V
OVHY
I
INOV
V
DL
V
GH
I
DRAIN
V
OL
PARAMETER
OV Pin Hysteresis
OV Pin Input Current
DRAIN Low Threshold
GATE High Threshold
Drain Input Bias Current
PWRGD Output Low Voltage
V
OV
= V
EE
V
DRAIN
– V
EE
, DRAIN Decreasing
∆V
GATE
– V
GATE
Decreasing
V
DRAIN
= 48V
PWRGD (LT4250L), (V
DRAIN
– V
EE
) < V
DL
I
OUT
= 1mA
I
OUT
= 5mA
PWRGD (LT4250H), V
DRAIN
= 5V
I
OUT
= 1mA
PWRGD (LT4250L), V
DRAIN
= 48V, V
PWRGD
= 80V
PWRGD (LT4250H), V
DRAIN
= 0V, V
PWRGD
= 80V
Figures 1a, 2
Figures 1a, 3
Figures 1a, 2
Figures 1a, 3
Figures 1a, 4a
Figures 1b, 4b
q
q
q
q
q
q
q
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN
TYP
20
– 0 .03
MAX
– 0.5
2.3
500
0.8
3.0
1.0
10
10
UNITS
mV
µA
V
V
µA
V
V
V
µA
µA
µs
µs
µs
µs
1.1
10
1.6
1.3
80
0.48
1.2
0.75
0.05
0.05
1.7
1.5
5.5
6.5
1
500
1
1
1.5
1.5
PWRGD Output Low Voltage
(PWRGD – DRAIN)
I
OH
AC
t
PHLOV
t
PHLUV
t
PLHOV
t
PLHUV
t
PHLSENSE
t
PHLCB
t
PHLDL
t
PHLGH
OV High to GATE Low
UV Low to GATE Low
OV Low to GATE High
UV High to GATE High
SENSE High to Gate Low
Current Limit to GATE Low
Output Leakage
3
µs
µs
µs
µs
µs
µs
DRAIN Low to PWRGD Low
(LT4250L) Figures 1a, 5a
DRAIN Low to (PWRGD – DRAIN) High (LT4250H) Figures 1a, 5a
GATE High to PWRGD Low
GATE High to (PWRGD – DRAIN) High
(LT4250L) Figures 1a, 5b
(LT4250H) Figures 1a, 5b
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to V
EE
unless otherwise
specified.
TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current vs Supply Voltage
1.8
1.7
T
A
= 25°C
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
1.6
1.5
1.4
1.3
1.2
1.1
0
0
20
80
60
SUPPLY VOLTAGE (V)
40
100
1640 G01
GATE VOLTAGE (V)
U W
Supply Current vs Temperature
1.6
V
DD
= 48V
1.5
1.4
1.3
1.2
1.1
Gate Voltage vs Supply Voltage
15
14
13
12
11
10
9
8
7
T
A
= 25°C
1.0
– 50
– 25
0
25
50
TEMPERATURE (°C)
75
100
1640 G02
6
0
20
80
60
40
SUPPLY VOLTAGE (V)
100
1640 G03
4250lhf
3
LT4250L/LT4250H
TYPICAL PERFOR A CE CHARACTERISTICS
Gate Voltage vs Temperature
15.0
V
DD
= 48V
14.5
14.0
13.5
13.0
12.5
12.0
– 50
GATE PULL-UP CURRENT (µA)
TRIP VOLTAGE (mV)
GATE VOLTAGE (V)
– 25
25
50
0
TEMPERATURE (°C)
Gate Pull-Down Current
vs Temperature
55
0.5
PWRGD OUTPUT LOW VOLTAGE (V)
V
GATE
= 2V
GATE PULL-DOWN CURRENT (mA)
OUTPUT IMPEDANCE (kΩ)
52
49
46
43
40
– 50
– 25
0
50
25
TEMPERATURE (°C)
PIN FUNCTIONS
PWRGD/PWRGD (Pin 1):
Power Good Output Pin. This pin
will latch a power good indication when V
DRAIN
is within V
DL
of V
EE
and V
GATE
is within V
GH
of
∆V
GATE
. This pin can be
connected directly to the enable pin of a power module.
When the DRAIN pin of the LT4250L is above V
EE
by more
than V
DL
or V
GATE
is more than V
GH
from
∆V
GATE
, the
PWRGD pin will be high impedance, allowing the pull-up
current of the module’s enable pin to pull the pin high and
turn the module off. When V
DRAIN
drops below V
DL
and
V
GATE
rises above V
GH
, the PWRGD pin sinks current to
V
EE
, pulling the enable pin low and turning on the module.
This condition is latched until the GATE pin is turned off via
the UV, OV, UVLO or the electronic circuit breaker.
When the DRAIN pin of the LT4250H is above V
EE
by more
than V
DL
or V
GATE
is more than V
GH
from
∆V
GATE
, the
PWRGD pin will sink current to the DRAIN pin which pulls
the module’s enable pin low, forcing it off. When V
DRAIN
drops below V
DL
and V
GATE
rises above V
GH
, the PWRGD
sink current is turned off, allowing the module’s pull-up
current to pull the enable pin high and turn on the module.
This condition is latched until the GATE pin is turned off via
the UV, OV, UVLO or the electronic circuit breaker.
4250lhf
4
U W
75
1640 G04
Current Limit Trip Voltage
vs Temperature
55
54
53
52
51
50
49
48
– 50
48
47
46
45
44
43
42
41
Gate Pull-Up Current
vs Temperature
V
GATE
= 0V
100
– 25
50
0
25
TEMPERATURE (°C)
75
100
1640 G05
40
– 50
– 25
0
25
50
TEMPERATURE (°C)
75
100
1640 G06
PWRGD Output Low Voltage
vs Temperature (LT4250L)
8
I
OUT
= 1mA
0.4
PWRGD Output Impedance
vs Temperature (LT4250H)
V
DRAIN
– V
EE
> 2.4V
7
6
5
4
3
2
– 50
0.3
0.2
0.1
75
100
1640 G07
0
– 50
– 25
25
50
0
TEMPERATURE (°C)
75
100
1640 G08
– 25
0
25
50
TEMPERATURE (°C)
75
100
1640 G09
U
U
U
LT4250L/LT4250H
PIN FUNCTIONS
OV (Pin 2):
Analog Overvoltage Input. When OV is pulled
above the 1.255V threshold, an overvoltage condition is
detected and the GATE pin will be immediately pulled low.
The GATE pin will remain low until OV drops below the
1.235V threshold.
UV (Pin 3):
Analog Undervoltage Input. When UV is
pulled below the 1.125V threshold, an undervoltage
condition is detected and the GATE pin will be immedi-
ately pulled low. The GATE pin will remain low until UV
rises above the 1.255 threshold.
The UV pin is also used to reset the electronic circuit
breaker. If the UV pin is cycled low and high following the
trip of the circuit breaker, the circuit breaker is reset and
a normal power-up sequence will occur. The response
time for this pin is 1.5µs. Add an external capacitor to this
pin for additional filtering.
V
EE
(Pin 4):
Negative Supply Voltage Input. Connect to
the lower potential of the power supply.
SENSE (Pin 5):
Circuit Breaker Sense Pin. With a sense
resistor placed in the supply path between V
EE
and
SENSE, the overcurrent condition will pull down the
GATE pin and regulate the voltage across the resistor to
be 50mV. If the overcurrent condition exists for more
than 500µs the electronic circuit breaker will trip and turn
off the external MOSFET.
If the current limit value is set to twice the normal
operating current, only 25mV is dropped across the
sense resistor during normal operation. To disable the
current limit feature, V
EE
and SENSE can be shorted
together.
GATE (Pin 6):
Gate Drive Output for the External
N-Channel MOSFET. The GATE pin will go high when the
following start-up conditions are met: the UV pin is high,
the OV pin is low, (V
SENSE
– V
EE
) < 50mV and the V
DD
pin
is greater than V
UVLOH
. The GATE pin is pulled high by a
45µA current source and pulled low with a 50mA current
source. During current limit the GATE pin is pulled low
using a 100mA current source.
DRAIN (Pin 7):
Analog Drain Sense Input. Connect this
pin to the drain of the external N-channel MOSFET and the
V
–
pin of the power module. When the DRAIN pin is
below V
DL
, the PWRGD/PWRGD pin will latch to indicate
the switch is on.
V
DD
(Pin 8):
Positive Supply Voltage Input. Connect this
pin to the higher potential of the power supply inputs and
the V
+
pin of the power module. An undervoltage lockout
circuit disables the chip until the V
DD
pin is greater than
the 16V V
UVLOH
threshold.
BLOCK DIAGRA
UV
REF
LOGIC
OV
–+
V
EE
SENSE
+
–
W
+
+
–
–
U
U
U
V
DD
UVLO
V
CC
AND
REFERENCE
GENERATOR
V
CC
REF
OUTPUT
DRIVE
PWRGD/PWRGD
50mV
500µs
DELAY
GATE
DRIVER
+
+
–
V
EE
V
DL
–
+
–
–
+
V
GH
∆V
GATE
4250 BD
GATE
DRAIN
4250lhf
5
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