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5962F9862401VCC

产品描述AC SERIES, QUAD 2-INPUT OR GATE, CDIP14, SIDE BRAZED, CERAMIC, DIP-14
产品类别逻辑    逻辑   
文件大小49KB,共2页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
下载文档 详细参数 选型对比 全文预览

5962F9862401VCC概述

AC SERIES, QUAD 2-INPUT OR GATE, CDIP14, SIDE BRAZED, CERAMIC, DIP-14

5962F9862401VCC规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称Renesas(瑞萨电子)
零件包装代码DIP
包装说明DIP-14
针数14
Reach Compliance Codenot_compliant
系列AC
JESD-30 代码R-CDIP-T14
JESD-609代码e0
负载电容(CL)50 pF
逻辑集成电路类型OR GATE
最大I(ol)0.012 A
功能数量4
输入次数2
端子数量14
最高工作温度125 °C
最低工作温度-55 °C
封装主体材料CERAMIC, METAL-SEALED COFIRED
封装代码DIP
封装等效代码DIP14,.3
封装形状RECTANGULAR
封装形式IN-LINE
峰值回流温度(摄氏度)NOT SPECIFIED
电源5 V
Prop。Delay @ Nom-Sup12 ns
传播延迟(tpd)12 ns
认证状态Not Qualified
施密特触发器NO
筛选级别MIL-PRF-38535 Class V
座面最大高度5.08 mm
标称供电电压 (Vsup)5 V
表面贴装NO
技术CMOS
温度等级MILITARY
端子面层Tin/Lead (Sn/Pb)
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
处于峰值回流温度下的最长时间NOT SPECIFIED
总剂量300k Rad(Si) V
宽度7.62 mm
Base Number Matches1

文档预览

下载PDF文档
ACS32MS
Data Sheet
November 1998
File Number
4545
Radiation Hardened Quad 2-Input OR Gate
The Radiation Hardened ACS32MS is a Quad 2-Input OR
Gate. For each gate, a HIGH level on either A or B input
results in a HIGH level on the Y output. A LOW level on both
the A and B inputs results in a LOW level on the Y output. All
inputs are buffered and the outputs are designed for
balanced propagation delay and transition times.
The ACS32MS is fabricated on a CMOS Silicon on Sapphire
(SOS) process, which provides an immunity to Single Event
Latch-up and the capability of highly reliable performance in
any radiation environment. These devices offer significant
power reduction and faster performance when compared to
ALSTTL types.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACS32MS are
contained in SMD 5962-98624. A “hot-link” is provided
on our homepage with instructions for downloading.
www.intersil.com/data/sm/index.asp
Features
• QML Qualified Per MIL-PRF-38535 Requirements
• 1.25 Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-Up Free Under any Conditions
- Total Dose. . . . . . . . . . . . . . . . . . . . . . 3 x 10
5
RAD (Si)
- SEU Immunity . . . . . . . . . . . . . <1 x 10
-10
Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . . >100MeV/(mg/cm
2
)
• Input Logic Levels . . . . V
IL
= (0.3)(V
CC
), V
IH
= (0.7)(V
CC
)
• Output Current . . . . . . . . . . . . . . . . . . . . . . . .
±8mA
(Min)
• Quiescent Supply Current . . . . . . . . . . . . . . 100µA (Max)
• Propagation Delay . . . . . . . . . . . . . . . . . . . . . . 12ns (Max)
Applications
• High Speed Control Circuits
• Sensor Monitoring
• Low Power Designs
Ordering Information
ORDERING NUMBER
5962F9862401VCC
ACS32D/SAMPLE-03
5962F9862401VXC
ACS32K/SAMPLE-03
5962F9862401V9A
INTERNAL MKT. NUMBER
ACS32DMSR-03
ACS32D/SAMPLE-03
ACS32KMSR-03
ACS32K/SAMPLE-03
ACS32HMSR-03
TEMP. RANGE (
o
C)
-55 to 125
25
-55 to 125
25
25
PACKAGE
14 Ld SBDIP
14 Ld SBDIP
14 Ld Flatpack
14 Ld Flatpack
Die
DESIGNATOR
CDIP2-T14
CDIP2-T14
CDFP4-F14
CDFP4-F14
N/A
Pinouts
ACS32MS
(SBDIP)
TOP VIEW
A1 1
B1 2
Y1 3
A2 4
B2 5
Y2 6
GND 7
14 V
CC
13 B4
12 A4
11 Y4
10 B3
9 A3
8 Y3
ACS32MS
(FLATPACK)
TOP VIEW
A1
B1
Y1
A2
B2
Y2
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
B4
A4
Y4
B3
A3
Y3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

5962F9862401VCC相似产品对比

5962F9862401VCC 5962F9862401VXC 5962F9862401V9A
描述 AC SERIES, QUAD 2-INPUT OR GATE, CDIP14, SIDE BRAZED, CERAMIC, DIP-14 AC SERIES, QUAD 2-INPUT OR GATE, CDFP14 QUAD 2-INPUT OR GATE, UUC14
零件包装代码 DIP DFP DIE
包装说明 DIP-14 DFP, FL14,.3 DIE,
针数 14 14 16
Reach Compliance Code not_compliant not_compliant unknown
系列 AC AC AC
JESD-30 代码 R-CDIP-T14 R-CDFP-F14 R-XUUC-N16
JESD-609代码 e0 e0 e0
逻辑集成电路类型 OR GATE OR GATE OR GATE
功能数量 4 4 4
输入次数 2 2 2
端子数量 14 14 16
封装主体材料 CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED UNSPECIFIED
封装代码 DIP DFP DIE
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 IN-LINE FLATPACK UNCASED CHIP
传播延迟(tpd) 12 ns 12 ns 12 ns
认证状态 Not Qualified Not Qualified Not Qualified
筛选级别 MIL-PRF-38535 Class V MIL-PRF-38535 Class V MIL-PRF-38535 Class V
表面贴装 NO YES YES
技术 CMOS CMOS CMOS
端子面层 Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) TIN LEAD
端子形式 THROUGH-HOLE FLAT NO LEAD
端子位置 DUAL DUAL UPPER
总剂量 300k Rad(Si) V 300k Rad(Si) V 300k Rad(Si) V
Base Number Matches 1 1 1
是否Rohs认证 不符合 不符合 -
厂商名称 Renesas(瑞萨电子) - Renesas(瑞萨电子)
负载电容(CL) 50 pF 50 pF -
最大I(ol) 0.012 A 0.012 A -
最高工作温度 125 °C 125 °C -
最低工作温度 -55 °C -55 °C -
封装等效代码 DIP14,.3 FL14,.3 -
峰值回流温度(摄氏度) NOT SPECIFIED NOT SPECIFIED -
电源 5 V 5 V -
Prop。Delay @ Nom-Sup 12 ns 12 ns -
施密特触发器 NO NO -
座面最大高度 5.08 mm 2.92 mm -
标称供电电压 (Vsup) 5 V 5 V -
温度等级 MILITARY MILITARY -
端子节距 2.54 mm 1.27 mm -
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED -
宽度 7.62 mm 6.285 mm -

 
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