74VCXR162601 Low Voltage 18-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs and 26Ω
Series Resistors in the Outputs
August 1998
Revised April 1999
74VCXR162601
Low Voltage 18-Bit Universal Bus Transceivers with 3.6V
Tolerant Inputs and Outputs and 26Ω Series Resistors in
the Outputs
General Description
The VCXR162601, 18-bit universal bus transceiver, com-
bines D-type latches and D-type flip-flops to allow data flow
in transparent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable
(OEAB and OEBA), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs. The clock can be con-
trolled by the clock-enable (CLKENAB and CLKENBA)
inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is HIGH. When LEAB is
LOW, the A data is latched if CLKAB is held at a HIGH-to-
LOW logic level. If LEAB is LOW, the A bus data is stored
in the latch/flip-flop on the LOW-to-HIGH transition of
CLKAB. Output-enable OEAB is active-LOW. When OEAB
is HIGH, the outputs are in the high-impedance state.
Data flow for B to A is similar to that of A to B but uses
OEBA, LEBA, CLKBA and CLKENBA.
The 74VCXR162601 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The VCXR162601 is also designed with 26Ω series resis-
tors on both the A and B Port outputs. This design reduces
line noise in applications such as memory address drivers,
clock drivers, and bus transceivers/transmitters.
Features
s
1.65–3.6V V
CC
supply operation
s
3.6V tolerant inputs and outputs
s
26Ω series resistors on both the A and B Port outputs.
s
t
PD
(A to B, B to A)
3.8 ns max for 3.0V to 3.6V V
CC
4.6 ns max for 2.3V to 2.7V V
CC
9.2 ns max for 1.65V to 1.95V V
CC
s
Power-down HIGH impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
Static Drive (I
OH
/I
OL
)
±12
mA @ 3.0V V
CC
±8
mA @ 2.3V V
CC
±3
mA @ 1.65V V
CC
s
Uses patented noise/EMI reduction circuitry
s
Latchup performance exceeds 300 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>200V
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Order Number
74VCXR162601MTD
Package Number
MTD56
Package Description
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
© 1999 Fairchild Semiconductor Corporation
DS500171.prf
www.fairchildsemi.com
74VCXR162601
Connection Diagram
Pin Descriptions
Pin Names
OEAB, OEBA
LEAB, LEBA
CLKAB, CLKBA
Description
Output Enable Inputs (Active LOW)
Latch Enable Inputs
Clock Inputs
CLKENAB, CLKENBA Clock Enable Inputs
A
1
–A
18
B
1
–B
18
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
Function Table
(Note 2)
Inputs
CLKENAB OEAB
X
X
X
H
H
L
L
L
L
H
L
L
L
L
L
L
L
L
LEAB
X
H
H
L
L
L
L
L
L
CLKAB
X
X
X
X
X
↑
↑
L
H
A
n
X
L
H
X
X
L
H
X
X
Outputs
B
n
Z
L
H
B
0
(Note 3)
B
0
(Note 3)
L
H
B
0
(Note 3)
B
0
(Note 4)
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial (HIGH or LOW, inputs may not float)
Z
=
HIGH Impedance
Note 2:
A-to-B data flow is shown; B-to-A flow is similar but uses OEBA,
LEBA, CLKBA, and CLKENBA.
Note 3:
Output level before the indicated steady-state input conditions
were established
Note 4:
Output level before the indicated steady-state input conditions
were established, provided that CLKAB was HIGH before LEAB went LOW.
Logic Diagram
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2
74VCXR162601
Absolute Maximum Ratings
(Note 5)
Supply Voltage (V
CC
)
DC Input Voltage (V
I
)
Output Voltage (V
O
)
Outputs 3-STATE
Outputs Active (Note 6)
DC Input Diode Current (I
IK
) V
I
<
0V
DC Output Diode Current (I
OK
)
V
O
<
0V
V
O
>
V
CC
DC Output Source/Sink Current
(I
OH
/I
OL
)
DC V
CC
or Ground Current per
Supply Pin (I
CC
or Ground)
Storage Temperature Range (T
STG
)
±100
mA
−65°C
to
+150°C
±50
mA
−50
mA
+50
mA
−0.5V
to
+4.6V
−0.5
to V
CC
+
0.5V
−50
mA
−0.5V
to
+4.6V
−0.5V
to
+4.6V
Recommended Operating
Conditions
(Note 7)
Power Supply
Operating
Data Retention Only
Input Voltage
Output Voltage (V
O
)
Output in Active States
Output in 3-STATE
Output Current in I
OH
/I
OL
V
CC
=
3.0V to 3.6V
V
CC
=
2.3V to 2.7V
V
CC
=1.65V
to 2.3V
Free Air Operating Temperature (T
A
)
Minimum Input Edge Rate (∆t/∆V)
V
IN
=
0.8V to 2.0V, V
CC
=
3.0V
10 ns/V
Note 5:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the Absolute Maximum Rat-
ings. The Recommended Operating Conditions tables will define the condi-
tions for actual device operation.
Note 6:
I
O
Absolute Maximum Rating must be observed.
Note 7:
Floating or unused pin (inputs or I/O's) must be held HIGH or LOW.
1.65V to 3.6V
1.2V to 3.6V
−0.3V
to 3.6V
0V to V
CC
0.0V to 3.6V
±12
mA
±8
mA
±3
mA
−40°C
to
+85°C
DC Electrical Characteristics (2.7V
<
V
CC
≤
3.6V)
Symbol
V
IH
V
IL
V
OH
Parameter
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
I
OH
= −100 µA
I
OH
= −6
mA
I
OH
= −8
mA
I
OH
= −12
mA
V
OL
LOW Level Output Voltage
I
OL
=
100
µA
I
OL
=
6 mA
I
OL
=
8 mA
I
OL
=
12 mA
I
I
I
OZ
I
OFF
I
CC
∆I
CC
Input Leakage Current
3-STATE Output Leakage
Power Off Leakage Current
Quiescent Supply Current
Increase in I
CC
per Input
0V
≤
V
I
≤
3.6V
0V
≤
V
O
≤
3.6V
V
I
=
V
IH
or V
IL
0V
≤
(V
I
, V
O
)
≤
3.6V
V
I
=
V
CC
or GND
V
CC
≤
(V
I
, V
O
)
≤
3.6V (Note 8)
V
IH
=
V
CC
−
0.6V
Note 8:
Outputs disabled or 3-STATE only.
Conditions
V
CC
(V)
2.7–3.6
2.7–3.6
2.7–3.6
2.7
3.0
3.0
2.7–3.6
2.7
3.0
3.0
2.7–3.6
2.7–3.6
0
2.7–3.6
2.7–3.6
2.7–3.6
Min
2.0
Max
Units
V
0.8
V
CC
−
0.2
2.2
2.4
2.2
0.2
0.4
0.55
0.8
±5.0
±10
10
20
±20
750
V
V
V
µA
µA
µA
µA
µA
3
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