Philips Semiconductors
Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state
FEATURES
•
5 V tolerant inputs/outputs for interfacing with 5 V logic
•
Wide supply voltage range from 1.2 to 3.6 V
•
CMOS low power consumption
•
MULTIBYTE
TM
flow-through standard pin-out
architecture
•
Low inductance multiple power and ground pins for
minimum noise and ground bounce
•
Direct interface with TTL levels
•
High-impedance when V
CC
= 0 V
•
All data inputs have bushold (74LVCH16245A only)
•
Complies with JEDEC standard no. 8-1A
•
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
≤
2.5 ns.
SYMBOL
t
PHL
/t
PLH
C
I
C
I/O
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
Σ(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
.
PARAMETER
input capacitance
input/output capacitance
power dissipation capacitance per gate
V
CC
= 3.3 V; notes 1 and 2
CONDITIONS
DESCRIPTION
74LVC16245A;
74LVCH16245A
The 74LVC(H)16245A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families. Inputs can be
driven from either 3.3 or 5 V devices. In 3-state operation,
outputs can handle 5 Volt. These features allow the use of
these devices as a mixed 3.3 and 5 V environment.
The 74LVC(H)16245A is a 16-bit transceiver featuring
non-inverting 3-state bus compatible outputs in both send
and receive directions. The device features two output
enable (nOE) inputs for easy cascading and two
send/receive (nDIR) inputs for direction control. nOE
controls the outputs so that the buses are effectively
isolated. This device can be used as two 8-bit transceivers
or one 16-bit transceiver.
The 74LVCH16245A bushold data inputs eliminates the
need for external pull-up resistors to hold unused inputs.
TYPICAL
2.2
5.0
10
30
ns
pF
pF
pF
UNIT
propagation delay nAn to nBn; nBn to nAn C
L
= 50 pF; V
CC
= 3.3 V
2003 Nov 25
2
Philips Semiconductors
Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state
PINNING
SYMBOL
1DIR
1B0
1B1
GND
1B2
1B3
V
CC
1B4
1B5
1B6
1B7
2B0
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2DIR
2OE
2A7
2A6
2A5
2A4
2A3
2A2
2A1
2A0
1A7
1A6
1A5
1A4
1A3
1A2
1A1
1A0
1OE
n.c.
1
2
3
4, 10, 15, 21, 28, 34, 39, 45
5
6
7, 18, 31, 42
8
9
11
12
13
14
16
17
19
20
22
23
24
25
26
27
29
30
32
33
35
36
37
38
40
41
43
44
46
47
48
−
PIN
A1
B2
B1
B3, B4, D3, D4, G3, G4, J3, J4
C2
C1
C3, C4, H3, H4
D2
D1
E2
E1
F1
F2
G1
G2
H1
H2
J1
J2
K1
K6
J5
J6
H5
H6
G5
G6
F5
F6
E6
E5
D6
D5
C6
C5
B6
B5
A6
A2, A3, A4, A5, K2, K3, K4, K5
BALL
74LVC16245A;
74LVCH16245A
DESCRIPTION
direction control input
data input/output
data input/output
ground (0 V)
data input/output
data input/output
supply voltage
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
direction control input
output enable input (active LOW)
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
data input/output
output enable input (active LOW)
not connected
2003 Nov 25
4
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