3977
A3977xED
(PLCC)
LOAD
SUPPLY
1
SENSE
1
ENABLE
OUT
1A
HOME
GND
GND
GND
SLEEP
OUT
1B
MICROSTEPPING DMOS DRIVER
WITH TRANSLATOR
The A3977xED and A3977xLP are complete microstepping motor drivers
with built-in translator. They are designed to operate bipolar stepper motors in
full-, half-, quarter-, and eighth-step modes, with output drive capability of 35
V and ±2.5 A. The A3977 includes a fixed off-time current regulator that has
the ability to operate in slow-, fast-, or mixed-decay modes. This current-
decay control scheme results in reduced audible motor noise, increased step
accuracy, and reduced power dissipation.
The translator is the key to the easy implementation of the A3977. By
simply inputting one pulse on the STEP input the motor will take one step
(full, half, quarter, or eighth depending on two logic inputs). There are no
phase-sequence tables, high-frequency control lines, or complex interfaces to
program. The A3977 interface is an ideal fit for applications where a complex
µP is unavailable or over-burdened.
Internal synchronous-rectification control circuitry is provided to improve
power dissipation during PWM operation.
Internal circuit protection includes thermal shutdown with hysteresis,
under-voltage lockout (UVLO) and crossover-current protection. Special
power-up sequencing is not required.
The A3977 is supplied in a choice of two power packages, a 44-pin
plastic PLCC with copper batwing tabs (suffix ED), and a thin (<1.2 mm), 28-
pin TSSOP with an exposed thermal pad (suffix LP). The SLP package is
available in a lead-free version (100% matte tin leadframe).
Data Sheet
26184.22D
DIR
6
5
4
3
2
1
44
43
V
BB1
42
41
40
NC
NC
PFD
7
CHARGE PUMP
39 NC
38 CP
2
37 CP
1
36 V
CP
35 GND
34 GND
33 GND
REG
32
V
REG
8
9
PWM
TIMER
RC
1
10
GND 11
GND 12
GND 13
REF 14
RC
2
15
LOGIC
SUPPLY 16
NC 17
V
BB2
18
OUT
2A
TRANSLATOR
& CONTROL LOGIC
÷8
31 STEP
V
DD
30 NC
29 NC
19
MS
2
20
MS
1
21
SENSE
2
22
GND
23
GND
24
GND
25
SUPPLY
LOAD
2
26
SR
27
RESET
28
OUT
2B
Dwg. PP-075-1
ABSOLUTE MAXIMUM RATINGS
at T
A
= +25°C
Load Supply Voltage, V
BB
.............
35 V
Output Current, I
OUT
..................
±2.5 A
*
Logic Supply Voltage, V
DD
...........
7.0 V
Logic Input Voltage Range, V
IN
(t
w
>30 ns) .....
-0.3 V to V
DD
+ 0.3 V
(t
w
<30 ns) ...........
-1 V to V
DD
+ 1 V
Sense Voltage, V
SENSE
.................
0.5 V
Reference Voltage, V
REF
................
V
DD
Package Power Dissipation,
P
D
.................................
See page 3
Operating Temperature Range, T
A
(A3977Kx) ............
-40°C to +125°C
(A3977Sx) ..............
-20°C to +85°C
Junction Temperature, T
J
.........
+150°C
Storage Temperature Range,
T
S
.........................
-55°C to +150°C
* Output current rating may be limited by
duty cycle, ambient temperature, and heat
sinking. Under any set of conditions, do not
exceed the specified current rating or a
junction temperature of 150°C.
FEATURES
■
■
■
■
■
■
■
■
■
±2.5 A, 35 V Output Rating
Low r
DS(on)
Outputs, 0.45
Ω
Source, 0.36
Ω
Sink Typical
Automatic Current Decay Mode Detection/Selection
3.0 V to 5.5 V Logic Supply Voltage Range
Mixed, Fast, and Slow Current Decay Modes
Home Output
Synchronous Rectification for Low Power Dissipation
Internal UVLO and Thermal Shutdown Circuitry
Crossover-Current Protection
Always order by complete part number:
Part Number
A3977KED
A3977KLP
A3977SED
A3977SED-T
A3977SLP
A3977SLP-T
Package
44-pin PLCC
28-pin TSSOP
44-pin PLCC
44-pin PLCC; Lead-free
28-pin TSSOP
28-pin TSSOP; Lead-free
3977
MICROSTEPPING DMOS DRIVER
WITH TRANSLATOR
A3977xLP
ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS
(TSSOP)
SENSE
1
HOME
DIR
OUT
1A
PFD
RC
1
AGND
REF
RC
2
LOGIC
SUPPLY
OUT
2A
MS
2
MS
1
SENSE
2
1
2
3
4
V
BB1
28
27
26
25
LOAD
SUPPLY
1
SLEEP
ENABLE
OUT
1B
CP
2
CP
1
V
CP
PGND
V
REG
STEP
OUT
2B
RESET
SR
LOAD
SUPPLY
2
Dwg. PP-075
5.0
SUFFIX '–LP', R
θJA
= 28°C/W*
4.0
SUFFIX '–ED', R
θJA
= 32°C/W†
PWM
TIMER
CHARGE PUMP
5
6
7
8
9
10
11
12
13
14
24
23
22
21
3.0
SUFFIX '–LP',
R
θJA
= 33°C/W†
TRANSLATOR
& CONTROL LOGIC
2.0
÷8
REG
20
19
18
17
16
V
DD
1.0
SUFFIX 'S–'
SUFFIX 'K–'
0
25
50
75
100
125
AMBIENT TEMPERATURE IN
°
C
150
V
BB2
15
Dwg. GP-018-2A
Package Thermal Resistance, R
θJA
A3977xLP .........................
28
°
C/W
*
A3977xED ........................
32
°
C/W
†
A3977xLP .........................
33
°
C/W
†
* Measured on JEDEC standard “High-K” four-layer board.
† Measured on typical two-sided PCB with three square inches
(1935 mm
2
) copper ground area.
Table 1. Microstep Resolution Truth Table
MS
1
L
H
L
H
MS
2
L
L
H
H
Resolution
Full step (2 phase)
Half step
Quarter step
Eighth step
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3
3977
MICROSTEPPING DMOS DRIVER
WITH TRANSLATOR
ELECTRICAL CHARACTERISTICS at T
A
= +25
°
C, V
BB
= 35 V, V
DD
= 3.0 V to 5.5V (unless otherwise
noted)
Limits
Characteristic
Output Drivers
Load Supply Voltage Range
V
BB
Operating
During sleep mode
Output Leakage Current
I
DSS
V
OUT
= V
BB
V
OUT
= 0 V
Output On Resistance
r
DS(on)
Source driver, I
OUT
= -2.5 A
Sink driver, I
OUT
= 2.5 A
Body Diode Forward Voltage
V
F
Source diode, I
F
= -2.5 A
Sink diode, I
F
= 2.5 A
Motor Supply Current
I
BB
f
PWM
< 50 kHz
Operating, outputs disabled
Sleep mode
Control Logic
Logic Supply Voltage Range
Logic Input Voltage
V
DD
V
IN(1)
V
IN(0)
Logic Input Current
I
IN(1)
I
IN(0)
Maximum STEP Frequency
HOME Output Voltage
f
STEP
V
OH
V
OL
Blank Time
Fixed Off Time
t
BLANK
t
off
I
OH
= -200
µA
I
OL
= 200
µA
R
t
= 56 kΩ, C
t
= 680 pF
R
t
= 56 kΩ, C
t
= 680 pF
V
IN
= 0.7V
DD
V
IN
= 0.3V
DD
Operating
3.0
0.7V
DD
–
-20
-20
500*
0.7V
DD
–
700
30
5.0
–
–
<1.0
<1.0
–
–
–
950
38
5.5
–
0.3V
DD
20
20
–
–
0.3V
DD
1200
46
V
V
V
µA
µA
kHz
V
V
ns
µs
8.0
0
–
–
–
–
–
–
–
–
–
–
–
<1.0
<1.0
0.45
0.36
–
–
–
–
–
35
35
20
-20
0.57
0.43
1.4
1.4
8.0
6.0
20
V
V
µA
µA
Ω
Ω
V
V
mA
mA
µA
Symbol Test Conditions
Min.
Typ.
Max.
Units
continued next page …
4
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3977
MICROSTEPPPING DMOS DRIVER
WITH TRANSLATOR
ELECTRICAL CHARACTERISTICS at T
A
= +25°C, V
BB
= 35 V, V
DD
= 3.0 V to 5.5V (unless otherwise
noted)
Limits
Characteristic
Control Logic (cont’d)
Mixed Decay Trip Point
Symbol
Test Conditions
Min.
Typ.
Max.
–
–
V
DD
±3.0
±10
±5.0
±5.0
800
–
–
2.95
–
12
10
20
Units
V
V
V
µA
%
%
%
ns
°C
°C
V
V
mA
mA
µA
PFDH
–
0.6V
DD
PFDL
–
0.21V
DD
Ref. Input Voltage Range
V
REF
Operating
0
–
Reference Input Current
I
REF
–
0
E
G
V
REF
= 2 V, Phase Current = 38.27%
–
–
Gain (G
m
) Error
V
REF
= 2 V, Phase Current = 70.71%
–
–
(note 3)
–
–
V
REF
= 2 V, Phase Current = 100.00%
Crossover Dead Time
t
DT
SR enabled
100
475
–
165
Thermal Shutdown Temp.
T
J
Thermal Shutdown Hysteresis
∆T
J
–
15
2.45
2.7
UVLO Enable Threshold
V
UVLO
Increasing V
DD
UVLO Hysteresis
∆V
UVLO
0.05
0.10
Logic Supply Current
I
DD
f
PWM
< 50 kHz
–
–
Outputs off
–
–
Sleep mode
–
–
* Operation at a step frequency greater than the specified minimum value is possible but not warranteed.
NOTES: 1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
3. E
G
= ([V
REF
/8] – V
SENSE
)/(V
REF
/8)
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