3972
CHARGE
PUMP
DUAL DMOS FULL-BRIDGE MICRO-
STEPPING PWM MOTOR DRIVER
VCP
CP1
CP2
OUT
1B
LOAD
SUPPLY
1
GROUND
GROUND
SENSE
1
OUT
1A
STROBE
CLOCK
DATA
1
2
3
4
5
6
7
8
9
9
10
11
12
24
23
22
21
20
19
18
17
16
OSC
SLEEP
V
REG
OUT
2B
LOAD
SUPPLY
2
GROUND
GROUND
SENSE
2
OUT
2A
LOGIC
SUPPLY
MUX
REF
6-BIT DAC
& LOGIC
6-BIT DAC
& LOGIC
V
BB1
V
BB2
SERIAL PORT
V
DD
15
14
13
Dwg. PP-069-3
ABSOLUTE MAXIMUM RATINGS
at T
A
= +25°C
Load Supply Voltage, V
BB
................
50 V
Output Current, I
OUT
......................
±1.5
A
Logic Supply Voltage, V
DD
..............
7.0 V
Logic Input Voltage Range,
V
IN
................
-0.3 V to V
DD
+ 0.3 V
Reference Voltage, V
REF
.....................
3 V
Sense Voltage (dc), V
S
................
500 mV
Package Power Dissipation,
P
D
..........................................
3.1 W
Operating Temperature Range,
T
A
..........................
-20°C to +85°C
Junction Temperature, T
J
.............
+150°C
Storage Temperature Range,
T
S
.........................
-55°C to +150°C
Output current rating may be limited by duty
cycle, ambient temperature, and heat sinking.
Under any set of conditions, do not exceed the
specified current rating or a junction tempera-
ture of 150°C.
Designed for pulse-width modulated (PWM) current control of
bipolar microstepping stepper motors, the A3972SB is capable of
continuous output currents to
±1.5
A and operating voltages to 50 V.
Internal fixed off-time PWM current-control timing circuitry can be
programmed via a serial interface to operate in slow, fast, and mixed
current-decay modes.
The desired load-current level is set via the serial port with two 6-bit
linear DACs in conjunction with a reference voltage. The six bits of
control allow maximum flexibility in torque control for a variety of step
methods, from microstepping to full-step drive. Load current is set in
1.56% increments of the maximum value.
Synchronous rectification circuitry allows the load current to flow
through the low r
DS(on)
of the DMOS output driver during the current
decay. This feature will eliminate the need for external clamp diodes in
most applications, saving cost and external component count, while
minimizing power dissipation.
Internal circuit protection includes thermal shutdown with hyster-
esis, transient-suppression diodes, and crossover-current protection.
Special power-up sequencing is not required.
The A3972SB is supplied in a 24-lead plastic DIP with a copper
batwing power tab (suffix ‘B’). The power tab is at ground potential and
needs no electrical isolation.
Data Sheet
29319.33
FEATURES
I
±1.5
A, 50 V Continuous Output Rating
I
Low r
DS(on)
DMOS Output Drivers
I
Optimized Microstepping via 6-Bit Linear DACs
I
Programmable Mixed, Fast, and Slow Current-Decay Modes
I
4 MHz Internal Oscillator for Digital Timing
I
Serial-Interface Controls Chip Functions
I
Synchronous Rectification for Low Power Dissipation
I
Internal UVLO and Thermal Shutdown Circuitry
I
Crossover-Current Protection
I
Precision 2 V Reference
I
Inputs Compatible with 3.3 V or 5 V Control Signals
I
Sleep and Idle Modes
Always order by complete part number:
A3972SB
.
3972
DUAL DMOS FULL-BRIDGE
MICROSTEPPING PWM MOTOR DRIVER
FUNCTIONAL BLOCK DIAGRAM
0.22
µF
0.22
µF
22
V
REG
3
CP2
2
CP1
LOGIC
SUPPLY
2V
15
V
DD
UVLO AND
FAULT
DETECT
REGULATOR
BANDGAP
V
CP
LOAD
SUPPLY
CHARGE PUMP
1
V
BB1
MUX
14
5
0.22
µF
6-BIT
LINEAR
DAC
+
6
DMOS H-BRIDGE
SENSE
1
V
CP
-
OUT
1A
9
OSCILATOR
OSC
24
PROGRAMMABLE
PWM TIMER
FIXED-OFF
BLANK
MIXED DECAY
OUT
1B
4
OSC SELECT/
DIVIDER
SENSE
1
8
CLOCK
11
DATA
12
STROBE
10
SERIAL
PORT
CONTROL
LOGIC
PHASE 1/2
SYNC. RECT. MODE
SYNC. RECT. DISABLE
MODE 1/2
GATE
DRIVE
DMOS H-BRIDGE
0.1
µF
20
V
BB2
SLEEP
23
OUT
2A
16
PROGRAMMABLE
PWM TIMER
2V
6
FIXED-OFF
BLANK
MIXED DECAY
OUT
2B
21
REF
13
BUFFER
+
6-BIT
LINEAR
DAC
-
SENSE
2
17
0.1
µF
6
GROUND
7
18 19
Dwg. FP-050-1
2
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 2000, Allegro MicroSystems, Inc.
3972
DUAL DMOS FULL-BRIDGE
MICROSTEPPING PWM MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at T
A
= +25
°
C, V
BB
= 50 V, V
DD
= 5.0 V, V
S
= 0.5 V,
f
PWM
< 50 kHz (unless otherwise noted).
Limits
Characteristic
Load Supply Voltage Range
Symbol
V
BB
V
DD
I
BB
Test Conditions
Operating
During sleep mode
Logic Supply Voltage Range
Load Supply Current
Operating
f
PWM
< 50 kHz
Operating, outputs disabled
Sleep or idle mode
Logic Supply Current
I
DD
f
PWM
< 50 kHz
Outputs off
Idle mode (D0 = 1, D18 = 0)
Sleep mode
Output Drivers
Output Leakage Current
I
DSS
r
DS(on)
V
F
V
OUT
= V
BB
V
OUT
= 0 V
Output On Resistance
Source driver, I
OUT
= –1.5 A
Sink driver, I
OUT
= 1.5 A
Body Diode Forward Voltage
Source diode, I
F
= 1.5 A
Sink diode, I
F
= 1.5 A
Control Logic
Logic Input Voltage
V
IN(1)
V
IN(0)
Logic Input Current
OSC Input Frequency Range
I
IN(1)
I
IN(0)
f
OSC
—
∆V
IN
V
IN
= 2.0 V
V
IN
= 0.8 V
Divide by one
(D0 =1, D13 = 0, D14 = 1)
OSC Input Duty Cycle
Input Hysterisis
40
0.20
—
—
60
0.40
%
V
2.0
—
—
—
2.5
—
—
<1.0
<-2.0
—
—
0.8
20
-20
6.0
V
V
µA
µA
MHz
—
—
—
—
—
—
<1.0
<-1.0
0.5
0.315
—
—
50
-50
0.55
0.35
1.2
1.2
µA
µA
Ω
Ω
V
V
Min.
15
0
4.5
—
—
—
—
—
—
—
Typ.
—
—
5.0
—
—
—
—
—
—
—
Max.
50
50
5.5
8.0
6.0
20
12
10
1.5
100
Units
V
V
V
mA
mA
µA
mA
mA
mA
µA
continued next page ...
www.allegromicro.com
3
3972
DUAL DMOS FULL-BRIDGE
MICROSTEPPING PWM MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at T
A
= +25
°
C, V
BB
= 50 V, V
DD
= 5.0 V, V
S
= 0.5 V,
f
PWM
< 50 kHz (unless otherwise noted).
Limits
Characteristics
Control Logic (continued)
Internal Oscillator
f
OSC
E
T
V
REF(EXT)
V
OS
V
REF
/V
S
I
REF
V
REF(INT)
E
G
D0 = 0, D17 = 0,
D18 = 0, DAC = 63
D18 = 0, DAC = 31
D18 = 1, DAC = 63
D18 = 1, DAC = 15
Comparator Input Offset Voltage
Propagation Delay Times
V
IO
t
pd
V
REF
= 0 V
50% to 90%:
PWM change to source on
PWM change to source off
PWM change to sink on
PWM change to sink off
Crossover Dead Time
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
UVLO Enable Threshold
UVLO Hysteresis
t
dt
T
J
∆T
J
V
UVLO
∆V
UVLO
Increasing V
DD
500
50
500
50
300
—
—
3.9
0.05
800
150
800
150
700
165
15
4.2
0.10
1200
350
1200
350
900
—
—
4.45
—
ns
ns
ns
ns
ns
°C
°C
V
V
—
—
—
—
—
0
0
0
0
±5.0
±6
±9
±6
±10
—
%
%
%
%
mV
D0 = 0, D18 = 0
D0 = 0, D18 = 1
Reference Input Current
Internal Reference Voltage
Gain (G
m
) Error (note 3)
V
REF
= 2.0 V
OSC shorted to ground
R
OSC
= 51 kΩ
DAC Accuracy (total error)
Relative to DAC reference buffer
output, D0 = 0, D17 = 0
Reference Input Voltage Range
Reference Buffer Offset
Reference Divider Ratio
0.5
—
—
—
—
1.94
—
±10
8.0
4.0
—
2.0
2.6
—
—
—
±0.5
2.06
V
mV
—
—
µA
V
3.0
3.4
—
4.0
4.0
±1/2
5.0
4.6
—
MHz
MHz
LSB
Symbol
Test Conditions
Min.
Typ.
Max.
Units
NOTES: 1. Typical Data is for design information only.
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
3. E
G
= [(V
REF
/Range) – V
S
]/(V
REF
/Range).
4
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
3972
DUAL DMOS FULL-BRIDGE
MICROSTEPPING PWM MOTOR DRIVER
FUNCTIONAL DESCRIPTION
Serial Interface.
The A3972SB is controlled via a 3-wire
(clock, data, strobe) serial port. The programmable functions
allow maximum flexibility in configuring the PWM to the
motor drive requirements. The serial data is written as two
19-bit words: 1 bit to select the word and 18 bits of data. The
serial data is clocked in starting with D18.
Word 0 Bit Assignments
Bit
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
Function
Word select = 0
Bridge 1, DAC, LSB
Bridge 1, DAC, bit 2
Bridge 1, DAC, bit 3
Bridge 1, DAC, bit 4
Bridge 1, DAC, bit 5
Bridge 1, DAC, MSB
Bridge 2, DAC, LSB
Bridge 2, DAC, bit 2
Bridge 2, DAC, bit 3
Bridge 2, DAC, bit 4
Bridge 2, DAC, bit 5
Bridge 2, DAC, MSB
Bridge 1 phase
Bridge 2 phase
Bridge 1 mode
Bridge 2 mode
REF select
Range select
D13 Bridge 1 Phase.
This bit controls the direction of
output current for Load 1.
D13
OUT
1A
OUT
1B
0
1
L
H
H
L
D14 Bridge 2 Phase.
This bit controls the direction of
output current for Load 2.
OUT
2B
D14
OUT
2A
0
1
D15 Bridge 1 Mode.
D15
0
1
D16 Bridge 2 Mode.
D16
0
1
Mode
Mixed-decay
Slow-decay
Mode
Mixed-decay
Slow-decay
L
H
H
L
D17 REF Select.
This bit determines the reference input for
the 6-bit linear DACs.
D17
0
1
Reference Voltage
Internal 2 V
External (3 V max)
D1 – D6 Bridge 1 Linear DAC.
Six-bit word sets desired
current level for Bridge 1. Setting all six bits to zero disables
Bridge 1, with all drivers off (See current regulation section of
functional description).
D7 – D12 Bridge 2 Linear DAC.
Six-bit word sets desired
current level for Bridge 2. Setting all six bits to zero disables
Bridge 2, with all drivers off (See current regulation section of
functional description).
D18 G
m
Range Select.
This bit determines the scaling factor
(4 or 8) used.
D18
0
1
Divider
1/8
1/4
Load Current
I
TRIP
= V
DAC
/8R
S
I
TRIP
= V
DAC
/4R
S
continued next page ...
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