f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz.
Vdd_YY
f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz.
Vdd_YY
LVCMOS Output Characteristics
Output Low Voltage
VOL
–
–
10%
Vdd
Input Characteristics
Input High Voltage
Input Low Voltage
Input Pull-up Impedance
VIH
VIL
Z_in
70%
–
50
2
Startup Time
Enable/Disable Time
Resume Time
RMS Period Jitter
T_start
T_oe
T_resume
T_jitt
–
–
–
–
–
Peak-to-peak Period Jitter
T_pk
–
–
RMS Phase Jitter (random)
T_phj
–
–
–
–
–
–
87
–
–
–
–
1.8
–
12
14
0.5
1.3
–
–
–
30%
150
–
5
138
5
Jitter
3
3.3
25
30
0.9
2
1.4
2.3
ps
ps
ps
ps
ps
ps
ps
ps
Vdd
Vdd
k
M
ms
ns
ms
Startup and Resume Timing
Table 2. Pin Description
Pin
Symbol
Output Enable
1
OE/ST /NC
̅ ̅̅
Functionality
H
[1]
: specified frequency output
L: output is high impedance. Only output driver is disabled.
H
[1]
: specified frequency output
L: output is low (weak pull down). Device goes to sleep mode. Supply
current reduces to I_std.
Any voltage between 0 and Vdd or Open
[1]
: Specified frequency
output. Pin 1 has no function.
Electrical ground
Oscillator output
Power supply voltage
[2]
OE/ST /NC
̅ ̅̅
Top View
VDD
Standby
No Connect
2
3
4
GND
OUT
VDD
Power
Output
Power
GND
OUT
Figure 1. Pin Assignments
Notes:
1. In OE or ST mode, a pull-up resistor of 10 kΩ or less is recommended if pin 1 is not externally driven. If pin 1 needs to be left floating, use the NC option.
̅ ̅̅
2.
A capacitor of value 0.1 µF or higher between Vdd and GND is required.
Rev 1.07
Page 2 of 18
www.sitime.com
SiT1602B
Low Power, Standard Frequency Oscillator
Table 3. Absolute Maximum Limits
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part. Actual performance
of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Storage Temperature
Vdd
Electrostatic Discharge
Soldering Temperature (follow standard Pb free
soldering guidelines)
Junction Temperature
[3]
Note:
3. Exceeding this temperature for extended period of time may damage the device.
Min.
-65
-0.5
–
–
–
Max.
150
4
2000
260
150
Unit
°C
V
V
°C
°C
Table 4. Thermal Consideration
[4]
Package
7050
5032
3225
2520
2016
JA, 4 Layer Board
(°C/W)
142
97
109
117
152
JA, 2 Layer Board
(°C/W)
273
199
212
222
252
JC, Bottom
(°C/W)
30
24
27
26
36
Note:
4. Refer to JESD51 for
JA
and
JC
definitions, and reference layout used to determine the
JA
and
JC
values in the above table.
Table 5. Maximum Operating Junction Temperature
[5]
Max Operating Temperature (ambient)
70°C
85°C
Maximum Operating Junction Temperature
80°C
95°C
Note:
5. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.
Table 6. Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Moisture Sensitivity Level
Condition/Test Method
MIL-STD-883F, Method 2002
MIL-STD-883F, Method 2007
JESD22, Method A104
MIL-STD-883F, Method 2003
MSL1 @ 260°C
Rev 1.07
Page 3 of 18
www.sitime.com
SiT1602B
Low Power, Standard Frequency Oscillator
Test Circuit and Waveform
[6]
Vdd
Vout
Test Point
tr
80% Vdd
tf
4
Power
Supply
0.1 uF
1
3
2
15pF
(including probe
and fixture
capacitance)
50%
20% Vdd
High Pulse
(TH)
Period
Low Pulse
(TL)
Vdd
OE/ST Function
1 kΩ
Figure 2. Test Circuit
Note:
6.
Duty Cycle is computed as Duty Cycle = TH/Period.
Figure 3. Waveform
Timing Diagrams
90% Vdd
Vdd
Vdd
50% Vdd
[7]
Pin 4 Voltage
T_start
No Glitch
during start up
ST Voltage
T_resume
CLK Output
HZ
T_start: Time to start from power-off
CLK Output
HZ
T_resume: Time to resume from ST
Figure 4. Startup Timing (OE/ ST̅ Mode)
̅ ̅
Figure 5. Standby Resume Timing ( ST̅ Mode Only)
̅ ̅
Vdd
50% Vdd
OE Voltage
T_oe
Vdd
OE Voltage
50% Vdd
T_oe
CLK Output
HZ
T_oe: Time to re-enable the clock output
CLK Output
HZ
T_oe: Time to put the output in High Z mode
Figure 6. OE Enable Timing (OE Mode Only)
Note:
7.
Figure 7. OE Disable Timing (OE Mode Only)
SiT1602 has “no runt” pulses and “no glitch” output during startup or resume.
EtherCAT（Ethernet for Control Automation Technology）是一种基于以太网的开发构架的实时工业现场总线通讯协议，EtherCAT是最快的工业以太网技术之一，同时它提供纳秒级精确同步。相对于设置了相同循环时间的其他总线系统，EtherCAT系统结构通常能减少25%-30%的CPU负载，EtherCAT的出现为系统的实时性能和拓扑的灵活性树立了新的标准。...[详细]
据外媒报道，萨里大学（University of Surrey）的研究人员开发出一种无需依赖GPS即可在人口密集的城市地区精确定位设备位置的人工智能系统。该系统可将定位误差从734米缩小到22米以内，这对于自动驾驶汽车和救援车辆等技术的发展意义重大。 图片来源： 萨里大学 在发表于《IEEE Robotics and Automation Letters》的论文中，研究人员介绍了PEn...[详细]
模拟电子
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
