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AN1218
Freescale Semiconductor, Inc...
HC05 to HC08 Optimization
By Mark Glenewinkel
CSIC Applications
Austin, Texas
Introduction
Freescale's HC05 Family of microcontrollers contains the world's most
popular 8-bit microcontroller units (MCUs). In keeping pace with
technology and the changing needs of the customer, Freescale has
designed the HC08 Family of MCUs. The HC08 Family CPU is a
performance extension to the HC05 Family of low cost MCUs. This
application note will describe the differences and advantages of the
HC08 Family CPU: the CPU08.
CPU08 is fully opcode and object code compatible with the HC05 CPU.
Any HC05 code will execute directly on the HC08 without instruction set
differences. As this application note will show, there are many
improvements to the speed and capability in the CPU08.
CPU08 is a faster processor. The basic execution speed of the CPU08
has been increased with advanced high performance CMOS
technology. Execution cycles of most instructions have been improved
with an advanced computer architecture.
CPU08 has more programming capability. It has more addressing
modes, better math support, and much improved data manipulation,
accessing, and moving capabilities. Looping and branching instructions
have also been optimized.
© Freescale Semiconductor, Inc., 2004. All rights reserved.
AN1218 Rev. 2
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Application Note
This application note will help inform and educate the reader concerning
the differences between the HC05 and HC08 CPUs. Detailed examples
illustrating the added features found with the CPU08 are given to help
optimize software design with the CPU08.
Scope of this Application Note
This note assumes the reader has a background in MCU software and
hardware design and is also familiar with the HC05. It was written for the
engineering manager and the design engineer. As a reference, the
application note overviews the basic differences between the two CPUs
so that one can fit the right CPU for a specific application. As a tutorial,
the application note gives the designer the means to understand and
utilize the HC08 enhancements. Software is given to illustrate and
compare the performance of the CPUs.
Freescale Semiconductor, Inc...
HC08 Features
The following is a list of major features of the HC08 CPU (CPU08) that
differentiate it from the HC05 CPU (CPU05).
•
•
•
•
•
•
•
•
•
Fully upward object code compatible with the MC6805,
MC146805, and the MC68HC05 Family
64 KByte program/data memory space
Enhanced HC05 programming model
8 MHz CPU bus frequency
16 addressing modes, 5 more than the HC05
Expandable internal bus definition for addressing range extension
beyond 64 KBytes
16-bit index register with manipulation instructions
16-bit stack pointer with manipulation instructions
Memory to memory data moves without using the accumulator
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Application Note
CPU05/CPU08 Programmer's Model Comparison
•
•
•
•
Fast 8-bit multiply and integer/fractional divide instructions
Binary coded decimal (BCD) instruction enhancements
Internal bus flexibility to accommodate CPU enhancing
peripherals such as a DMA controller
Fully static low voltage/low power design
CPU05/CPU08 Programmer's Model Comparison
Freescale Semiconductor, Inc...
The CPU05 and the CPU08 programmer's model differences are
illustrated in
Figure 1.
The index register of the CPU08 has been extended to 16 bits, allowing
the user to index or address a 64 KByte memory space without any
offset. The upper byte of the index register is called the H index register.
The concatenated 16-bit register is called the H:X register. Source code
written for CPU05 will not affect the H register and it will remain in its
reset state of $00. There are seven new instructions that allow the user
to manipulate the H:X index register. These instructions are covered in
detail later.
The stack pointer (SP) has been extended from its 6-bit CPU05 version
to a full 16-bit SP on the CPU08. SPH:SPL refers to the 16-bit stack
pointer by naming the high byte, SPH, and the low byte, SPL. To
maintain HC05 compatibility, the reset state is $00FF.
New instructions and new addressing modes greatly increase the utility
of the CPU08 stack pointer over the CPU05 stack pointer. Nine new
CPU08 instructions allow the user to easily manipulate the SP and the
stack.
CPU08 also has relative addressing modes that allow the SP to be used
as an index register to access temporary variables on the stack. These
addressing modes and new instructions are discussed later in this
application note.
H Index Register
Stack Pointer
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Application Note
7
7
A
0
0
ACCUMULATOR
X
12
PC
12
0
0
0
0
0
7
1
1
SP
CCR
0
0
INDEX REGISTER
PROGRAM COUNTER
STACK POINTER
Freescale Semiconductor, Inc...
H
I
N
Z
C
CONDITION CODE REGISTER
(a) CPU05
7
15
H
15
15
X
0
ACCUMULATOR (A)
0
INDEX REGISTER (H:X)
0
STACK POINTER (SP)
0
PROGRAM COUNTER (PC)
7
0
V 1 1 H I N Z C
CONDITION CODE REGISTER (CCR)
(b) CPU08
Figure 1. CPU05 and CPU08 Comparison
Program Counter
Expanded
The CPU08 program counter (PC) has been expanded to 16 bits which
allows the CPU08 to address 64 KBytes of memory. Not all HC05
devices have a 16-bit program counter.
CPU08 has 16 addressing modes, 8 more than the HC05.
Table 1
lists
these addressing modes and the CPUs that use them. A brief
discussion of these modes is given below.
New Addressing
Modes,
Comparison
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Application Note
CPU05/CPU08 Programmer's Model Comparison
Table 1. Addressing Mode Comparison Table
Addressing Mode
Inherent
Immediate
Direct
Extended
Indexed, no offset
HC05
X
X
X
X
X
X
X
X
HC08
X
X
X
X
X
X
X
X
X
X
X
X
X
Freescale Semiconductor, Inc...
Indexed, 8-bit offset
Indexed, 16-bit offset
Relative
Stack Pointer, 8-bit offset
Stack Pointer, 16-bit offset
Memory to memory (4 modes)
Indexed w/post increment
Indexed, 8-bit offset, w/post increment
HC05 and HC08
Addressing Modes
Inherent instructions such as reset stack pointer (RSP) and multiply
(MUL) have no operand. Inherent instructions require no memory
address and are one byte long.
Immediate instructions contain a value that is used in an operation with
the index register or accumulator. Immediate instructions require no
memory address and are two bytes long. The operand is found in the
byte immediately following the opcode.
Direct instructions can access any of the first 256 memory addresses
with only two bytes. The first byte contains the opcode followed by the
low byte of the operand address. The CPU automatically uses $00 for
the high byte of the operand address. Most direct instructions are two
bytes long.
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