R-2R Ladder Network
R-2R Series
•
±2% Absolute tolerance
•
Ladder accuracy +/- 1 LSB
•
8 and 10 bit R-2R Schematic
•
QSOP Package - Small Footprint
•
Standard Sn/Pb and Pb-free terminations available
Electrical Data
Resistance Value
(ohms)
Absolute
Tolerance
(%)
Ratio
Tolerance
Absolute TCR
(ppm/°C)
TCR Tracking
(ppm/°C)
Operating
Temperature Range
(°C)
10K/20K and 25K/50K
±2%
±1 LSB
±25, ±50, ±100
±5
-55 to +125
Schematic Data
20
19
18
17
16
15
14
13
12
11
2R
R
2R
R
2R
R
2R
R
2R
R
2R
2R
R
R
2R
R
2R
R
2R
2R
1
2
3
4
5
6
7
8
9
10
QS009 20-Pin,10 bit, R-2R Schematic
16
15
14
13
12
11
10
9
2R
R
2R
2R
R
R
2R
R
2R
2R
R
2R
R
2R
R
2R
1
2
3
4
5
6
7
8
QS014 16-Pin,8 bit, R-2R Schematic
General Note
IRC reserves the right to make changes in product specification without notice or liability.
All information is subject to IRC’s own data and is considered accurate at time of going to print.
© IRC Advanced Film Division
• 4222 South Staples Street • Corpus Christi Texas 78411 USA
Telephone: 361 992 7900 • Facsimile: 361 992 3377 • Website: www.irctt.com
A subsidiary of
TT electronics plc
R-2R Series Issue January 2009 Sheet 1 of 2
R-2R Ladder Network
Physical Data
# OF PINS
16
20
DIMENSION "D"
0.193
″
±0.004
0.341
″
±0.004
ZD REF
0.009
″
0.058
″
Note: All dimesions exclude mold flash and
end flash which shall not exceed 0.006" per side.
Drawing proportions not to scale.
Note: Lead Coplanarity 0.004" Max.
Ordering Data
Prefix
Model
GUS -
QS009
- 01 - 1002 -
G
QS009 = 20-Pin, 10 bit, R-2R Ladder Network with Sn/Pb terminations
QS009LF = 20-Pin, 10 bit, R-2R Ladder Network with 100% matte tin, Pb-free terminations
QS014 = 16 Pin, 8 bit, R-2R Ladder Network with Sn/Pb terminations
QS014LF = 16-Pin, 8 bit, R-2R Ladder Network with 100% matte tin, Pb-free terminations
Temperature Coefficient
Absolute Tolerance
G = ±2%
01 = ±100ppm/°C; 02 = ±50ppm/°C; 03 = ±25ppm/°C
Resistance
1002 = 10KΩ/20KΩ
2502 = 25KΩ/50KΩ
© IRC Advanced Film Division
• 4222 South Staples Street • Corpus Christi Texas 78411 USA
Telephone: 361 992 7900 • Facsimile: 361 992 3377 • Website: www.irctt.com
R-2R Series Issue January 2009 Sheet 1 of 2
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
