INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT9114
Nine wide Schmitt trigger buffer;
open drain outputs; inverting
Product specification
Supersedes data of March 1988
File under Integrated Circuits, IC06
December 1990
Philips Semiconductors
Product specification
Nine wide Schmitt trigger buffer;
open drain outputs; inverting
FEATURES
•
Schmitt trigger action on all data inputs
•
Output capability: standard (open drain)
•
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT9114 are high-speed Si-gate CMOS
devices and are pin compatible with low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard no. 7A.
The 74HC/HCT9114 are nine wide Schmitt trigger
inverting buffer with open drain outputs and Schmitt trigger
inputs.
74HC/HCT9114
The Schmitt trigger action in the data inputs transform
slowly changing input signals into sharply defined
jitter-free output signals.
The 74HC/HCT9114 have open-drain N-transistor
outputs, which are not clamped by a diode connected to
V
CC
. In the OFF-state, i.e. when one input is LOW, the
output may be pulled to any voltage between GND and
V
Omax
. This allows the device to be used as a
LOW-to-HIGH or HIGH-to-LOW level shifter. For digital
operation and OR-tied output applications, these devices
must have a pull-up resistor to establish a logic HIGH level.
The “9114” is identical to the “9115” but has inverting
outputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
= 6 ns
TYPICAL
SYMBOL
t
PHL
/ t
PLZ
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW):
P
D
= C
PD
×
V
CC2
×
f
i
+
∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
−
1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
PARAMETER
propagation delay A
n
to Y
n
input capacitance
power dissipation capacitance per buffer
notes 1 and 2
CONDITIONS
HC
C
L
= 15 pF; V
CC
= 5 V
12
3.5
5
HCT
13
3.5
5
ns
pF
pF
UNIT
December 1990
2
Philips Semiconductors
Product specification
Nine wide Schmitt trigger buffer;
open drain outputs; inverting
PIN DESCRIPTION
PIN NO.
1, 2, 3, 4, 5, 6, 7, 8, 9
10
19, 18, 17, 16, 15, 14, 13, 12, 11
20
SYMBOL
A
0
to A
8
GND
Y
0
to Y
8
V
CC
74HC/HCT9114
NAME AND FUNCTION
data inputs
ground (0 V)
data outputs
positive supply voltage
alfpage
1
A0
Y0
19
alfpage
1
19
2
A1
Y1
18
2
18
3
A2
Y2
17
3
17
4
A3
Y3
16
4
16
5
A4
Y4
15
5
15
6
A5
Y5
14
6
14
7
A6
Y6
13
7
13
8
A7
Y7
12
8
12
9
A8
Y8
MBA015
11
9
MBA014
11
Fig.1 Pin configuration.
Fig.2 Logic diagram.
Fig.3 IEC logic diagram.
December 1990
3
Philips Semiconductors
Product specification
Nine wide Schmitt trigger buffer;
open drain outputs; inverting
74HC/HCT9114
handbook, halfpage
Yn
An
GND
MBA021
Fig.4 Functional diagram.
Fig.5 Logic diagram (one Schmitt trigger).
FUNCTION TABLE
INPUTS
A
n
L
H
Notes
1. H = HIGH voltage level
L = LOW voltage level
Z = high impedance OFF-state
OUTPUTS
Y
n
Z
L
December 1990
4
Philips Semiconductors
Product specification
Nine wide Schmitt trigger buffer;
open drain outputs; inverting
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Transfer characteristics are given below.
Output capability: standard
I
CC
category: MSI
TRANSFER CHARACTERISTICS FOR 74HC
Voltages are referred to GND (ground = 0 V)
T
amb
(°C)
74HC
SYMBOL PARAMETER
+25
min.
typ.
max.
74HC/HCT9114
TEST CONDITIONS
UNIT V
CC
WAVEFORMS
(V)
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Fig.6
−40
to +85
min
.
max.
−40
to +125
min.
max.
V
T+
positive-going
threshold
negative-going
threshold
0.70
1.75
2.30
0.30
1.35
1.80
1.13 1.50
2.37 3.15
3.11 4.20
0.70 1.10
1.80 2.40
2.43 3.30
0.43 0.80
0.57 1.00
0.68 1.10
0.70
1.75
2.30
0.30
1.35
1.80
0.18
0.40
0.50
1.50
3.15
4.20
1.10
2.40
3.30
0.80
1.00
1.10
0.70
1.75
2.30
0.30
1.35
1.80
0.15
0.40
0.50
1.50
3.15
4.20
1.10
2.40
3.30
0.80
1.00
1.10
V
T−
V
Fig.6
V
H
hysteresis (V
T+
−
V
T−)
0.2
0.4
0.5
V
Fig.6
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
T
amb
(°C)
74HC
SYMBOL
PARAMETER
+25
min.
typ.
max.
TEST CONDITIONS
UNIT V
CC
WAVEFORMS
(V)
ns
2.0
4.5
6.0
2.0
4.5
6.0
Fig.7
−40
to +85
min.
max.
−40
to +125
min.
max.
t
PHL
/ t
PLZ
propagation delay
A
n
to Yn
output transition time
36
13
10
19
7
6
110
22
19
75
15
13
140
28
24
95
19
16
165
33
28
110
22
19
t
THL
ns
Fig.7
December 1990
5
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