HV9408
32-Channel Serial to Parallel Converter
With High Voltage Push-Pull Outputs
Features
►
►
►
►
►
►
►
Processed with HVCMOS
®
technology
Low power level shifting
Shift register speed 8.0MHz
Latched data outputs
5.0V CMOS compatible inputs
Forward and reverse shifting options
Diode to V
PP
allows efficient power recovery
General Description
The HV9408 is a low voltage serial to high voltage parallel
converters with push-pull outputs. This device has been designed
for use as a driver for AC-electroluminescent displays.It can also
be used in any application requiring multiple output, high voltage
current sourcing and sinking capabilities such as driving plasma
panels, vacuum fluorescent, or large matrix LCD displays.
These devices consist of a 32-bit shift register, 32 latches, and
control logic to enable outputs. HV
OUT
1 is connected to the first
stage of the shift register through the Output Enable logic. Data
is shifted through the shift register on the low to high transition of
the clock. The HV9408 shifts in the counter-clockwise direction
when viewed from the top of the package. A data output buffer is
provided for cascading devices. This output reflects the current
status of the last bit of the shift register (32). Operation of the shift
register is not affected by the LE (latch enable) or the OE (output
enable) inputs. Transfer of data from the shift register to the latch
occurs when the LE input is high. The data in the latch is retained
when LE is low.
Block Diagram
Output Enable
Latch Enable
Data Input
VPP
HV
OUT
1
Clock
32 bit
Static Shift
Register
32 Latches
HV
OUT
2
•
•
•
32 Outputs Total
•
•
•
HV
OUT
31
Data Out
HV
OUT
32
HV9408
Ordering Information
Package Options
Device
44-Lead Quad
Plastic Chip Carrier
.653x.653in body
.180in height (max)
.050in pitch
Pin Configurations
6
1 44
40
HV9408
-G indicates package is RoHS compliant (‘Green’)
HV9408PJ-G
44-Lead Quad Plastic Chip Carrier (PJ)
Product Marking
Absolute Maximum Ratings
Parameter
Supply voltage, V
DD
Supply voltage, V
PP
Logic input levels
Ground current
1
Continuous total power dissipation
2
Operating temperature range
Storage temperature range
Lead temperature
3
Value
-0.5V to +7.0V
-0.5V to +90V
-0.5V to V
DD
+0.5V
1.5A
1200W
-40 to +85
O
C
-65 to +150
O
C
260
O
C
YY = Year Sealed
WW = Week Sealed
HV9408PJ
LLLLLLLLLL
L = Lot Number
C = Country of Origin*
Bottom Marking
A = Assembler ID*
= “Green” Packaging
CCCCCCCCCCC
YYWW
Top Marking
AAA
*May be part of top marking
44-Lead Quad Plastic Chip Carrier (PJ)
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
Notes:
1. Duty cycle is limited by the total power dissipated in the package.
2. For operation above 25°C ambient derate linearly to maximum operating
3. temperature at 20mW/°C.
4. 1.6mm (1/16 inch) from case for 10 seconds
Recommended Operating Conditions
Sym
V
DD
V
PP
V
IH
V
IL
f
CLK
T
A
Parameter
Logic voltage supply
High voltage supply
Input high voltage
Input low voltage
Clock frequency
Operating free-air temperature
Min
4.5
8.0
V
DD
- 0.5
0
0
-40
Max
5.5
80
V
DD
0.5
8.0
+85
Units
V
V
V
V
MHz
O
C
2
HV9408
Electrical Characteristics
(V
DC Characteristics
Sym
I
PP
I
DDQ
I
DD
Parameter
V
PP
supply current
I
DD
supply current (quiescent)
I
DD
supply current (operating)
PP
= 60V, V
DD
= 5.0V, T
A
= 25°C)
Min
-
-
-
V
DD
-0.5
-
-
-
-
52
-
Max
100
100
15
-
0.5
1.0
-1.0
-1.5
-
4.0
Units
µA
µA
mA
V
V
µA
µA
V
V
V
Conditions
HV
OUTPUTS
high to low
All inputs = V
DD
or GND
V
DD
= V
DD
max, f
CLK
= 8.0 MHz
I
O
= -100µA
I
O
= 100µA
Input = V
DD
Input = GND
I
OC
= -5.0mA
I
OH
= -20mA, 0 to 70°C
I
OL
= 5.0mA, 0 to 70°C
V
OH
(Data) Shift register output voltage
V
OL
(Data) Shift register output voltage
I
IH
I
IL
V
OC
V
OH
V
OL
Current leakage, any input
Current leakage, any input
HV output clamp diode voltage
HV output when sourcing
HV output when sinking
AC Characteristics
Sym
f
CLK
t
WL
or t
WH
t
SU
t
H
Parameter
Clock frequency
Clock width, high or low
Setup time before CLK rises
Hold time after CLK rises
Min
-
62
25
10
-
-
50
50
50
-
-
Max
8.0
-
-
-
110
110
-
-
-
500
500
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
---
---
---
---
CL = 15pF
CL = 15pF
---
---
---
---
---
t
DLH
(Data) Data output delay after L to H CLK
t
DHL
(Data) Data output delay after H to L CLK
t
DLE
t
WLE
t
SLE
t
ON
t
OFF
LE delay after L to H CLK
Width of LE pulse
LE setup time before L to H CLK
Delay from LE to HV
OUT
, L to H
Delay from LE to HV
OUT
, H to L
Power-Up Sequence
1. Connect ground
2. Apply V
DD
3. Set all inputs (Data, CLK, Enable, etc.) to a known state
4. Apply V
PP
Power-down sequence should be the reverse of the above.
The V
PP
should not drop below V
DD
during operations.
3
Input and Output Equivalent Circuits
VDD
VDD
VPP
HV9408
Input
Data Out
HV
OUT
GND
Logic Inputs
GND
Logic Data Output
GND
High Voltage Outputs
Switching Waveforms
Data Input
50%
t
SU
Clock
50%
t
WL
50%
t
WH
50%
Data Out
t
DLH
50%
t
DHL
50%
t
DLE
t
WLE
90%
10%
t
OFF
HV
OUT
w/ S/R HIGH
10%
t
ON
90%
V
OH
V
OL
50%
t
SLE
V
OH
V
OL
Data Valid
t
H
50%
50%
50%
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
V
OH
V
OL
V
IH
V
OL
Latch Enable
HV
OUT
w/ S/R LOW
4
HV9408
Function Tables
Data Input
H
L
X
No
= low to high level transition.
CLK
Data Output
H
L
No change
Data Input
X
X
H
L
LE
X
L
H
H
OE
L
H
H
H
HV Output
All HV
OUT
= low
Previous latched data
H
L
Pin Description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Function
HV
OUT
16
HV
OUT
17
HV
OUT
18
HV
OUT
19
HV
OUT
20
HV
OUT
21
HV
OUT
22
HV
OUT
23
HV
OUT
24
HV
OUT
25
HV
OUT
26
HV
OUT
27
HV
OUT
28
HV
OUT
29
HV
OUT
30
HV
OUT
31
HV
OUT
32
Data Out
N/C
N/C
N/C
CLK
GND
VPP
VDD
Data shift register clock.
Input are shifted into the shift register on the positive edge of the clock.
Logic and high voltage ground.
High voltage power rail.
Low voltage logic power rail.
No connect.
Serial data output
Data output for cascading to the data input of the next device.
High voltage outputs.
High voltage push-pull outputs, which, depending on controlling low voltage data, can drive
loads either to a GND, or to V
PP
rail levels.
Function
5
无线连接
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
