HV220/HV20220/HV20320
Low Charge Injection
8-Channel High Voltage Analog Switches
Features
HVCMOS
®
technology for high performance
Very low quiescent power dissipation – 10µA
Output on-resistance typically 22 ohms
Low parasitic capacitances
DC to 10MHz analog signal frequency
-60dB typical output off isolation at 5MHz
CMOS logic circuitry for low power
Excellent noise immunity
On-chip shift register, latch and clear logic circuitry
Flexible high voltage supplies
General Description
These devices are low charge injection 8-channel high-voltage
analog switch integrated circuits (ICs) intended for use in
applications requiring high voltage switching controlled by low
voltage control signals, such as ultrasound imaging and print-
ers. Input data is shifted into an 8-bit shift register which can
then be retained in an 8-bit latch. To reduce any possible clock
feed-through noise, Latch Enable Bar (LE) should be left high
until all bits are clocked in. Using HVCMOS technology, these
switches combine high voltage bilateral DMOS switches and
low power CMOS logic to provide efficient control of high voltage
analog signals.
These ICs are suitable for various combinations of high voltage
supplies, e.g., V
PP
/V
NN
: +50V/–150V, or +100V/–100V.B
Applications
Medical ultrasound imaging
Piezoelectric transducer drivers
Block Diagram
D
IN
LATCHES
D
LE
CL
LEVEL
SHIFTERS
OUTPUT
SWITCHES
SW0
D
LE
CL
CLK
D
LE
CL
SW1
SW2
D
LE
CL
8 BIT
SHIFT
REGISTER
D
LE
CL
SW3
SW4
D
LE
CL
SW5
D
OUT
D
LE
CL
SW6
D
LE
CL
SW7
V
DD
LE
CL
V
NN
V
PP
1
HV220/HV20220/HV20320
Ordering Information
Package Options
Device
HV220
HV20220
HV20320
28-Lead PLCC
-
HV20220PJ
HV20220PJ-G
HV20320PJ
HV20320PJ-G
48-Lead LQFP/
TQFP(1.4mm)
-
HV20220FG
HV20220FG-G
-
26-Lead BCC
-
HV220B1-G
-
-
25-Ball fpBGA
HV220GA
HV220GA-G
-
-
-G indicates the part is RoHS compliant (‘Green’)
Absolute Maximum Ratings
Parameter
V
DD
logic power supply voltage
V
PP
- V
NN
supply voltage
V
PP
positive high voltage supply
V
NN
negative high voltage supply
Logic input voltages
Analog signal range
Peak analog signal current/channel
Storage temperature
Power dissipation:
28-Lead PLCC
48-Lead LQFP/ TQFP(1.4mm)
26-Lead BCC
25-Ball fpBGA
Value
-0.5V to +15V
220V
-0.5V to V
NN
+200V
+0.5V to -200V
-0.5V to V
DD
+0.3V
V
NN
to V
PP
3.0A
-65
O
C to +150
O
C
1.2W
1.0W
1.0W
1.0W
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
Operating Conditions
Symbol
V
DD
V
PP
V
NN
V
IH
V
IL
V
SIG
T
A
Parameter
Logic power supply voltage
1,3
positive high voltage supply
1,3
negative high voltage supply
1,3
High level input voltage
Low-level input voltage
Analog signal voltage peak-to-peak
Operating free air temperature
Value
4.5V to 13.2V
40V to V
NN
+200V
-40V to -160V
V
DD
-1.5V to V
DD
0V to 1.5V
V
NN
+10V to V
PP
-10V
2
0
O
C to 70
O
C
Notes:
1. Power up/down sequence is arbtrary except GND must be powered -up first and powered down last.
2. V
SIG
must be V
NN
≤ V
SIG
≤ V
PP
or floating during power up/down transition.
3. Rise and fall times of power supplies V
DD
, V
PP
, and V
NN
should not be less than 1.0msec.
2
HV220/HV20220/HV20320
Electrical Characteristics
DC Characteristics
(over recommended operating conditions unless otherwise noted)
Characteristics
Sym
0°C
min
max
30
25
Small Signal Switch (ON)
Resistance
R
ONS
25
18
23
22
Small Signal Switch (ON)
Resistance Matching
Large Signal Switch (ON)
Resistance
Switch Off Leakage
Per Switch
DC Offset Switch Off
DC Offset Switch On
Pos. HV Supply Current
Neg. HV Supply Current
Pos. HV Supply Current
Neg. HV Supply Current
Switch Output
Peak Current
Output Switch Frequency
f
SW
6.5
I
PP
Supply Current
I
PP
4.0
4.0
6.5
I
NN
Supply Current
I
NN
4.0
4.0
Logic Supply
Average Current
Logic Supply
Quiescent Current
Data Out Source Current
Data Out Sink Current
Logic Input Capacitance
I
DD
I
DDQ
I
SOR
I
SINK
C
IN
0.45
0.45
10
4.0
10
0.45
0.45
0.70
0.70
10
I
PPQ
I
NNQ
I
PPQ
I
NNQ
3.0
∆R
ONS
R
ONL
I
SOL
5.0
300
500
20
min
+25°C
typ*
26
22
22
18
20
16
5.0
15
1.0
100
100
10
-10
10
-10
3.0
10
300
500
50
-50
50
-50
2.0
50
7.0
5.0
5.0
7.0
5.0
5.0
4.0
10
0.40
0.40
10
8.0
5.5
5.5
8.0
5.5
5.5
4.0
10
mA
µA
mA
mA
pF
V
OUT
= V
DD
- 0.7V
V
OUT
= 0.7V
mA
mA
2.0
15
300
500
max
38
27
27
24
25
25
20
+70°C
min max
48
32
30
27
30
27
20
%
ohms
µA
mV
mV
µA
µA
µA
µA
A
KHz
ohms
Units
Test Conditions
I
SIG
= 5mA
I
SIG
= 200mA
I
SIG
= 5mA
I
SIG
= 200mA
I
SIG
= 5mA
I
SIG
= 200mA
V
PP
= 40V,
V
NN
= -160V
V
PP
= 100V,
V
NN
= -100V
V
PP
= 160V,
V
NN
= -40V
I
SW
= 5mA, V
PP
= 100V,
V
NN
= -100V
V
SIG
= V
PP
- 10V, I
SIG
= 1A
V
SIG
= V
PP
- 10V
and V
NN
+10V
R
L
= 100Ω
R
L
= 100KΩ
ALL SWs OFF
ALL SWs OFF
ALL SWs ON I
SW
= 5mA
ALL SWs ON I
SW
= 5mA
V
SIG
duty cycle
≤
0.1%
Duty Cycle = 50%
V
PP
= 40V,
V
NN
= -160V
V
PP
= 100V,
V
NN
= -100V
V
PP
= 160V,
V
NN
= -40V
V
PP
= 40V,
V
NN
= -160V
V
PP
= 100V,
V
NN
= -100V
V
PP
= 160V,
V
NN
= -40V
f
CLK
= 5MHz, V
DD
= 5.0V
50KHz
Output
Switching
Frequency
with no
load
*
Typical values are only for HV202/HV203
3
Electrical Characteristics
Characteristics
Set Up Time Before LE Rises
Time Width of LE
Clock Delay Time to Data Out
Time Width of CL
Set Up Time Data to Clock
Hold Time Data from Clock
Clock Freq
Clock Rise and Fall Times
Turn On Time
Turn Off Time
Sym
t
SD
t
WLE
t
DO
t
WCL
t
SU
t
h
f
CLK
t
r
, t
f
t
ON
t
OFF
150
15
35
5.0
50
5.0
5.0
20
Maximum V
SIG
Slew Rate
dv/dt
20
20
Off Isolation
KO
-30
-58
Switch Crosstalk
Output Switch Isolation
Diode Current
Off Capacitance SW to GND
On Capacitance SW to GND
K
CR
I
ID
C
SG(OFF)
C
SG(ON)
5.0
25
-60
300
17
50
5.0
25
12
38
-30
-58
-60
-70
300
17
50
-33
0°C
min
150
150
150
150
15
35
5.0
50
5.0
5.0
20
20
20
8.0
max
min
150
150
150
+25°C
typ*
max
HV220/HV20220/HV20320
+70°C
min
150
150
150
150
20
35
5.0
50
5.0
5.0
20
20
20
-30
-58
-60
300
5.0
25
17
50
dB
dB
dB
mA
pF
pF
V/ns
max
Units
ns
ns
ns
ns
ns
ns
MHz
ns
µs
µs
V
SIG
= V
PP
-10V,
R
L
= 10KΩ
V
SIG
= V
PP
-10V,
R
L
= 10KΩ
V
PP
= 160V,
V
NN
= -40V
V
PP
= 100V,
V
NN
= -100V
V
PP
= 40V,
V
NN
= -160V
f = 5MHz,
1KΩ//15pF load
f = 5MHz,
50Ω load
f = 5MHz,
50Ω load
300ns pulse width,
2.0% duty cycle
0V, 1MHz
0V, 1MHz
50% duty cycle
f
DATA
= f
CLK
/2
Test Conditions
AC Characteristics
(over operating conditions V
DD
= 5V, unless otherwise noted)
Electrical Characteristics
AC Characteristics
(over operating conditions V
DD
= 5V, unless otherwise noted)
Characteristics
Output Voltage Spike
Sym
min
+V
SPK
– V
SPK
+V
SPK
– V
SPK
+V
SPK
– V
SPK
Charge Injection
Q
820
600
350
pC
+25°C
typ*
max
150
150
150
150
150
150
V
PP
= 160V, V
NN
= -40V, R
L
= 50Ω
V
PP
= 40V, V
NN
= -160V, V
SIG
= 0V
V
PP
= 100V, V
NN
= -100V, V
SIG
= 0V
V
PP
= 160V, V
NN
= -40V, V
SIG
= 0V
mV
V
PP
= 100V, V
NN
= -100V, R
L
= 50Ω
V
PP
= 40V, V
NN
= -160V, R
L
= 50Ω
Units
Test Conditions
*
Typical values are only for HV202/HV203
4
HV220/HV20220/HV20320
Truth Table
D0
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
X
X
D1
D2
D3
D4
D5
D6
D7
LE
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
X
CL
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
HOLD PREVIOUS STATE
OFF OFF OFF OFF OFF OFF OFF OFF
X
X
Notes:
X
X
X
X
X
X
X
X
X
X
X
X
1. The eight switches operate independently.
2. Serial data is clocked in on the L to H transition CLK.
3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register
data flows through the latch.
4. D
OUT
is high when data in shift register 7 is high.
5. Shift register clocking has no effect on the switch states if LE is H.
6. The clear input overrides all other inputs.
Logic Timing Waveforms
D
N-1
DATA
IN
LE
50%
50%
t WLE
t
SD
50%
D
N
50%
D
N+1
CLOCK
50%
t
SU
t
t
h
50%
DD
DATA
OUT
50%
t
t ON
OFF
V
OUT
OFF
(TYP)
90%
ON
10%
50%
50%
CLR
t
WCL
5
MEMS传感器
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