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74AUP1G17GM-G

产品描述缓冲器和线路驱动器 1.8V single schmitt trig buff
产品类别半导体    逻辑   
文件大小655KB,共23页
制造商NXP(恩智浦)
官网地址https://www.nxp.com
标准
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74AUP1G17GM-G概述

缓冲器和线路驱动器 1.8V single schmitt trig buff

74AUP1G17GM-G规格参数

参数名称属性值
厂商名称NXP(恩智浦)
产品种类缓冲器和线路驱动器
RoHS
逻辑系列AUP
逻辑类型CMOS
每芯片的通道数量Single
极性Non-Inverting
电源电压(最大值)3.6 V
电源电压(最小值)0.8 V
最大工作温度+ 125 C
最小工作温度- 40 C
安装风格SMD/SMT
封装 / 箱体SOT-886
封装Reel - 7 i
高电平输出电流- 4 mA
低电平输出电流4 mA
传播延迟时间19 ns @ 1.1 V to 1.3 V

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74AUP1G17
Low-power Schmitt trigger
Rev. 4 — 15 July 2010
Product data sheet
1. General description
The 74AUP1G17 provides the single Schmitt-trigger buffer. It is capable of transforming
slowly changing input signals into sharply defined, jitter-free output signals.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage V
T+
and the negative voltage V
T
is defined as the input
hysteresis voltage V
H
.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9
A
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C

 
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