HV6008
32-Channel
±
40V Liquid Crystal Display Row Driver
Ordering Information
Package Options
44-Lead
Quad Plastic Chip Carrier
HV6008PJ
44-Lead
Quad Plastic Gullwing
HV6008PG
HV6008
Features
Symmetrical
±
40V output swing
Active return to GND
15mA peak source/sink/GND current per channel
+5V control logic
Special shift register with clear
Phase shift control
Output enable
Data out enable
1MHz shift register
Surface mount package available
bs
o
-6V
+6V
+42V
-42V
V
DD1
- 0.3V to V
DD2
+ 0.3V
700mA
1W
-40°C to +85°C
-65°C to +150°C
1
Absolute Maximum Rati
te
Ratings
Supply voltage, V
DD11
oltage,
1
Supply
voltage, V
DD21
ly
O
Supply voltage, V
PP1,2
age,
Supply voltage, V
NN1,2
Logic input levels
1
els
Ground currrent
2
Continuous total power dissipation
3
Operating temperature range
Storage temperature range
03/28/07
Notes:
1. All voltages are referenced to GND.
2. Duty cycle is limited by the total power dissipated in the package.
3. For operation above 25°C ambient derate linearly to 85°C at 16.7mW/°C.
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
le
te
General
Description
ral
Not recommended for new designs.
commended
nded
ne
designs
esigns
Device
The HV60 is a 32-channel liquid cr
e
32-channe quid
crystal display driver with 3-state
D
DMOS outputs. Each output c be set to +40V, -40V, or GND.
can
A symmetric waveform can be applied to a capacitive load using
the phase shift feature of the HV60.
The HV60 consists of a 32-bit shift register with Clear, Enable, and
hase
log
Phase Shift logic, and 32 high voltage output buffers. With the
Enable pin held low, all outputs are placed in the return to zero
(GND
state.
(GND) state When Enable is high, each output reflects the data
in its shift register bit. All outputs with a logic “0” in their shift
registe
register will be in the return to zero state. Outputs with a logic “1”
th
in their shift register will reflect the state of the phase shift pin.
T
These outputs will be switched to V
PP
when phase shift is high and
V
NN
when phase shift is logic “0”.
Additional functions provided are Shift Register Clear and Data
Out. All bits of the shift register are changed to logic “0” when Clear
is pulled low. With Clear at a logic “1”, normal shift register
operation proceeds. The data output reflects the status of the
32nd shift register stage.
HV6008
Electrical Characteristics
(over recommended operating conditions unless noted)
DC Characteristics
Symbol
I
DD1,2
V
IH
V
IL
V
OH
V
OL
I
IH
I
IL
I
PP
I
NN
V
OH
V
CL
V
OL
Z
OH
Z
CL
Z
OL
I
O
Parameter
V
DD
supply current
Logic input high
Logic input low
Logic output high
Logic output low
High-level logic input current
Low-level logic input current
High voltage supply current
High voltage supply current
Output voltage high
Output voltage clamp
Output voltage low
Output switch impedence high
Output switch impedance clamp
Output switch impedance low
DC output current
Output H or L
Data out H or L
1000
500
700
5
150
mA
µA
Ω
V
PP
, V
NN
=
±40
I
O
=
±15mA
1 output only
+39
-20
+20
-39
V
DD1
V
DD2
+2
V
DD1
+2
-2
+3
-50
+1
-1
Min
Typ
Max
500
V
DD2
-2
Units
µA
V
V
V
V
µA
µA
mA
mA
V
mV
V
Conditions
V
I
= 4V, V
DD1
= -6V
V
I
= 4V, V
DD2
= +6V
V
DD1
= -4.5V,
V
DD2
= +4.5V
V
DD1
= -4.5V
V
DD2
= +4.5V
I
OH
= -15µA
I
OL
= 250µA
V
I
= V
DD
, V
DD1,2
= max
V
I
= 0V, V
DD1,2
= max
Static, no load
Static, no load
V
PP
, V
NN
=
±40
No load
AC Characteristics
Symbol
t
WH
t
WL
t
SU
t
H
Parameter
Width of high data pulse
Width of low data pulse
Data set-up time before clock falls
Data hold time after clock falls
Phase shift duty cycle
Min
500
500
25
10
50
Typ
Max
Units
ns
ns
ns
ns
%
Conditions
Recommended Operating Conditions
Symbol
V
DD1
V
DD2
V
PP
V
NN
V
IH
V
IL
I
O Pk.
T
A
f
DIN
f
PS
Logic supply voltage
Logic supply voltage
High voltage supply
High voltage supply
High-level input voltage
Low-level input voltage
Peak output current (any state)
Operating free-air temperature
Input data rate
Phase shift rate
-40
Parameter
Min
-4
+4
+10
-10
+2V
-2V
Typ
Max
-6
+6
+40
-40
V
DD2
V
DD1
±80
+70
1
20
Units
V
V
V
V
V
V
mA
°C
MHz
KHz
Note:
Power-up sequence should be the following:
1. Connect ground.
2. Apply V
DD
.
Power-down sequence should be the reverse of the above.
3.
4.
Set all inputs (Data, CLK, Enable, etc.) to a known state.
Apply V
PP
and V
NN
.
2
HV6008
Pin Configurations
44-Pin J-Lead
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Function
HV
OUT
16
HV
OUT
15
HV
OUT
14
HV
OUT
13
HV
OUT
12
HV
OUT
11
HV
OUT
10
V
PP
HV
OUT
9
HV
OUT
8
HV
OUT
7
HV
OUT
6
HV
OUT
5
HV
OUT
4
HV
OUT
3
HV
OUT
2
HV
OUT
1
Data In
GND
Phase Shift
Clock
Clear
Pin
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Function
V
DD 1
Enable
V
DD 2
GND
Data Out
HV
OUT
32
HV
OUT
31
HV
OU
30
HV
OUT
29
HV
OUT
28
HV
OUT
27
HV
OUT
26
HV
OUT
25
HV
OUT
24
V
NN
HV
OUT
23
HV
OUT
22
HV
OUT
21
HV
OUT
20
HV
OUT
19
HV
OUT
18
HV
OUT
17
Package Outlines
39 38 37 36 35 34 33 32 31 30 29
40
41
42
43
44
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17
28
27
26
25
24
23
22
21
20
19
18
top view
44-pin J Lead Package
44-Pin Quad Palstic Package
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Function
HV
OUT
21
HV
OUT
20
HV
OUT
19
HV
OUT
18
HV
OUT
17
HV
OUT
16
HV
OUT
15
HV
OUT
14
HV
OUT
13
HV
OUT
12
HV
OUT
11
HV
OUT
10
V
PP
HV
OUT
9
HV
OUT
8
HV
OUT
7
HV
OUT
6
HV
OUT
5
HV
OUT
4
HV
OUT
3
HV
OUT
2
HV
OUT
1
Pin
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Function
Data In
GND
Phase Shift
Clock
Clear
V
DD1
Enable
V
DD2
GND
Data Out
HV
OUT
32
HV
OUT
31
HV
OUT
30
HV
OUT
29
HV
OUT
28
HV
OUT
27
HV
OUT
26
HV
OUT
25
HV
OUT
24
V
NN
HV
OUT
23
HV
OUT
22
44 43 42 41 40 39 38 37 36 35 34
1
2
3
4
5
6
7
8
9
10
11
12 13 14 15 16 17 18 19 20 21 22
33
32
31
30
29
28
27
26
25
24
23
top view
44-pin Quad Plastic Gullwing Package
03/28/07
©2002 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
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