HV758
Four-Channel, High Speed,
±90V 2.2A Ultrasound Pulser
Features
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HVCMOS
®
technology for high performance
High density integration ultrasound transmitter
0 to ±90V output voltage
±2.2A source and sink current in PW mode
±580mA source and sink current in CW mode
Up to 20MHz operating frequency
Matched delay times
1.2 to 5.0V CMOS logic interface
Built-in output drain bleed resistors
General Description
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Application
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Medical ultrasound imaging
Piezoelectric transducer drivers
NDT ultrasound transmission
Pulse waveform generator
The Supertex HV758 is a four-channel, monolithic high voltage,
high speed pulse generator. It is designed for medical ultrasound
applications. This high voltage and high speed integrated circuit
can also be used for other piezoelectric, capacitive or MEMS
transducers in ultrasonic nondestructive detection and sonar
ranger applications.
The HV758 comprises a controller logic interface circuit, level
translators, MOSFET gate drivers and high power P-channel and
N-channel MOSFETs as the output stage for each channel.
The output current limit can be set to one of four levels by using
two mode control inputs. The output stages of each channel are
designed to provide peak output currents over ±2.2A when in
mode 4, with up to 180V swings. When in mode 1, the output
stages reduce the peak current to ±580mA for CW mode
operation, which reduces the power dissipation of the IC. The
power MOSFET gate drivers are supplied by two floating 10VDC
power supplies referenced to V
PP
and V
NN
. This direct coupling
topology of the gate drivers not only saves two high voltage
capacitors per channel, but also makes the PCB layout easier.
Typical Application Circuit
C1
+1.8 to 3.3V
+10V
+90V
V
PP
-10V
0 to +90V
C2
C3
C4
C5
VLL VDD
VSUB
VPF
VPP
OTP
SUB
EN
EN_PWR
RGND
MC0
MC1
+1.8 to 3.3V
Logic
PIN1
Level
Translator
P-Driver
R
P1
TXP1
D1
HVOUT1
NIN1
Level
Translator
N-Driver
TXN1
R
N1
N1
X1
1 of 4 Channels
GREF
VSS
RGND
VNF
C7
V
NN
+10V
VNN
C6
0 to -90V
HV758
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
HV758
Ordering Information
Device
HV758
64-Ball FCBGA
8.00x8.00mm body
1.97mm height (max)
0.80mm pitch
HV758FB
Pin Configuration
1
A
B
C
D
E
F
2
3
4
5
6
7
8
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Absolute Maximum Ratings
Parameter
V
SS
, Power supply reference
V
LL
, Positive logic supply
Value
0V
-0.5V to +7.0V
-0.5V to +14V
-0.5V to +14V
-0.5V to +14V
+190V
-0.5V to +95V
+0.5V to -95V
G
H
V
DD
, Positive logic and level translator supply
(V
PP
- V
PF
) Positive floating gate drive supply
(V
PP
- V
NN
) Differential high voltage supply
V
PP
, High voltage positive supply
V
NN
, High voltage negative supply
(V
NF
- V
NN
) Negative gate floating drive supply
64-Ball FCBGA
64-Ball FCBGA
(top view)
(top view)
Package Marking
YYWW
HV758FB
LLLLLLLLL
OTP, Over Temperature Protection output
-0.5V to +7.0V
-0.5V to +7.0V
+190V
+190V
+190V
+190V
YY = Year Sealed
WW = Week Sealed
L = Lot Number
All logic input PIN
X
, NIN
X
and EN voltages
(V
SUB
- V
SS
) Substrate to V
SS
voltage difference
(V
PP
- TXP
X
) V
PP
to TXP
X
voltage difference
Package may or may not include the following marks: Si or
64-Ball FCBGA
(V
SUB
- TXP
X
) Substrate to TXP
X
voltage difference
(TXN
X
- V
NN
) TXN
X
to V
NN
voltage difference
Operating temperature
Storage temperature
-40°C to +125°C
-65°C to +150°C
Thermal resistance, θ
ja
, (4 layer, 1oz., 4x3”, 36-via PCB)
12.8°C/W
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
Power-Up Sequence
Step
1
2
3
4
5
6
Power-Down Sequence
Step
1
2
3
4
5
6
Description
V
SUB
V
DD
Description
V
PP
and V
NN
V
DD
V
LL
V
SUB
All logic signals go to low
V
LL
with logic signal low
(V
PP
- V
PF
) and (V
NF
- V
NN
)
(V
PP
- V
PF
) and (V
NF
- V
NN
)
V
PP
and V
NN
Logic control signals
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
2
HV758
Operating Supply Voltages and Current (4 Channel Active)
Sym
V
LL
V
DD
V
PF
V
NF
Parameter
Logic voltage reference
Internal voltage supply
Positive gate driver supply
Negative gate drive supply
IC substrate voltage
Positive HV supply
Negative HV supply
Allowable slew rate
on V
PP,
V
NN
Min
1.2
7.5
(V
PP
-12.6)
(V
NN
+7.5)
V
DD
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-90
Typ
2.5
12
(V
PP
-12)
V
PP
-
-
-
(V
NN
+12)
Max
5.0
12.6
(V
PP
-7.5)
+90
+90
0
25
-
-
-
-
-
-
-
-
-
-
-
(V
NN
+12.6)
V
V
V
V
V
V
V
(Operating conditions, unless otherwise specified, V
SS
= 0V, V
LL
= +3.3V, V
DD
= +10V, V
PP
-V
PF
= +10V, V
NN
-V
NF
= -10V, V
PP
=+90V, V
NN
= -90V, T
A
= 25°C)
Units Conditions
---
---
Floating driver voltage supplies
equals V
DD
.
Must be the most positive potential
of the IC.
---
---
---
---
---
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V
SUB
V
PP
V
NN
SR
max
I
LL
I
DDQ
V/μs
μA
μA
V
LL
Current EN = Low
125
100
1.1
3.2
3.1
74
250
2.0
V
DD
Current EN = Low
I
DDEN
I
DDEN
I
PPQ
V
DD
Current EN = High
mA
mA
mA
μA
mA
mA
μA
mA
mA
μA
mA
mA
μA
mA
mA
f = 0MHz
V
DD
Current MODE = 4
V
DD
Current MODE = 1
V
PP
Current EN = Low
V
PP
Current MODE = 4
V
PP
Current MODE = 1
V
NN
Current EN = Low
I
DDENCW
I
PPEN
I
NNQ
90
f = 0MHz
258
215
78
258
215
37
70
35
42
I
PPENCW
I
NNEN
I
PFQ
90
f = 0MHz
V
NN
Current MODE = 4
V
NN
Current MODE = 1
V
PF
Current EN = Low
V
PF
Current MODE = 4
V
PF
Current MODE = 1
V
NF
Current EN = Low
I
NNENCW
I
PFEN
I
NFQ
70
f = 0MHz
I
PFENCW
I
NFEN
9.0
70
f = 0MHz
V
NF
Current MODE = 4
V
NF
Current MODE = 1
I
NFENCW
6.0
Note:
All supply current values are for reference only.
f = 5.0MHz, continuous, no loads
f = 5.0MHz, continuous, no loads
f = 5.0MHz, continuous, no loads
f = 5.0MHz, continuous, no loads
f = 5.0MHz, continuous, no loads
Under Voltage and Over Temperature Protection
Sym
Parameter
Min
-
3.5
0.7
3.5
-
-
95
-
Typ
-
-
-
-
-
1.0
110
7.0
Max
5.0
7.0
1.0
7.0
1.0
-
125
-
V
PULL_UP
Open drain pull-up voltage
V
UVDD
V
UVLL
V
UVVF
V
DD
threshold
V
LL
threshold
Units Conditions
V
V
V
V
V
mA
°C
---
---
---
---
V
PF
, V
NF
threshold
V
OL_OTP
I
OTP
T
OTP
T
HYS
OTP flag output low voltage
Max. open drain output
current
Over-temperature threshold
OTP output reset hysteresis
V
LL
= 2.5V, OTP = Active,
I
PULL_UP
= 1.0mA.
---
If over-temperature occurred, OTP
low and all TX outputs will be HiZ.
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
3
HV758
Electrical Characteristics
Sym
I
OUT
R
ON
C
OSS
Parameter
Output saturation current
Channel resistance
Output capacitance
(Operating conditions, unless otherwise specified, V
SS
= 0V, V
LL
= +3.3V, V
DD
= +10V, V
PP
-V
PF
= +10V, V
NN
-V
NF
= -10V, V
PP
=+90V, V
NN
= -90V, T
A
= 25°C)
Output P-Channel MOSFET, TXP (Mode 4)
Min
2.2
-
-
Typ
2.5
6.5
215
Max
-
-
-
Units Conditions
A
Ω
pF
---
I
SD
= 100mA
V
DS
= 25V, f = 1.0MHz
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Output N-Channel MOSFET, TXN (Mode 4)
Sym
I
OUT
R
ON
Parameter
Min
2.1
-
-
Output saturation current
Channel resistance
Output capacitance
Typ
2.2
6.3
90
Max
-
-
-
Units Conditions
A
---
Ω
I
SD
= 100mA
C
OSS
pF
V
DS
= 25V, f = 1.0MHz
MOSFET Drain Bleed Resistor
Sym
P
RO
Parameter
R
P/N1~4
Output bleed resistance
Min
10
-
Typ
15
-
Max
30
40
Units Conditions
kΩ
---
---
mW
Bleed resistors power limit
Logic Inputs
Sym
V
IH
V
IL
I
IH
I
IL
Parameter
Min
0
-
-
Typ
-
-
-
-
-
Max
V
LL
10
-
0.4
Units Conditions
V
V
---
---
---
---
---
Input logic high voltage
Input logic low voltage
Input logic low current
Input logic high current
(V
LL
-0.4)
μA
μA
pF
-10
C
IN
Input logic capacitance
5.0
AC Electrical Characteristics
Sym
t
r
t
f
Parameter
Output rise time
Output fall time
(Operating conditions, unless otherwise specified, V
SS
= 0V, V
LL
= +3.3V, V
DD
= +10V, V
PP
-V
PF
= +10V, V
NN
-V
NF
= -10V, V
PP
= +90V, V
NN
= -90V, T
A
= 25°C)
Min
-
-
-
-
-
-
-
-
-
Typ
32
32
-
30
70
18
18
-
Max
-
-
-
-
-
-
Units Conditions
ns
ns
330pF//2.5kΩ load
f
OUT
t
EN
t
dr
t
df
Output frequency range
Enable time
20
MHz
dB
μs
ns
ns
ns
HD2
Second harmonic distortion
Delay time on inputs rise
Delay time on inputs fall
Delay time matching
Delay on mode change
Delay jitter on rise or fall
100Ω resistor load
250
2.2Ω resistor load
(see timing diagram)
---
Δt
DELAY
t
dm
t
j
±3.0
20
-
P to N, channel to channel
2.5
15
μs
ps
V
PP
/V
NN
= +/-25V,
input t
r
50% to HV
OUT
t
r
or t
f
50%,
with 330pF//2.5kΩ load
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
4
HV758
Switching Time Diagram
NINx
PINx
90%
VPP
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Output 10%
t
r
0
t
r
10%
VNN
90%
Switch AC Test Timing Diagram
V
LL
V
DD
V
SUB
V
PF
V
PP
OTP
SUB
EN
EN_PWR
RGND
R
P1
MC0
MC1
PIN1
Level
Translator
P-Driver
TXP1
TXN1
NIN1
Level
Translator
N-Driver
R
N1
R2
R1
1of n Channels
RGND
G
REF
V
SS
V
NF
V
NN
PINx
50%
t
drp
t
dfp
NINx
50%
I
OUT
t
drn
t
dfn
50%
TXPx
0A
TXNx
0A
50%
I
OUT
●
1235 Bordeaux Drive, Sunnyvale, CA 94089
●
Tel: 408-222-8888
●
www.supertex.com
5
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