Actel Corporation, Mountain View, CA 94043
© 2007 Actel Corporation. All rights reserved.
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Part Number: 50200094-0
Release: March 2007
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Table of Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Core Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Device Utilization and Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1
2
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Tool Flows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Licenses . . . . . . . . . . . . .
CoreConsole . . . . . . . . . .
Importing into Libero IDE . . .
Simulation Flows . . . . . . . .
Synthesis in Libero IDE . . . .
Place-and-Route in Libero IDE
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.9
.9
10
10
10
10
3
Interface Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4
Supported CFI Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Read . . . . . . . . . . .
Write . . . . . . . . . . .
Read Query Command . .
Read ID Codes Command
Read Array Command . .
Read Status Command . .
Clear Status Command . .
Erase Page Command . .
Single Write Command .
Multi-Write Command .
Page Lock Command . . .
Page Unlock Command .
Timing Diagrams . . . . .
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16
16
16
21
22
23
24
25
26
27
29
30
31
5
Implementation Hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Usage with Internal Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Generating and Programming the CFI Query Database . . . . . . . . . . . . . . . . . . . . . . 35
6
Testbench Operation and Modification . . . . . . . . . . . . . . . . . . . . . 39
Verification Testbench . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Simple Application Testbench . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
A VHDL Testbench Support Routines . . . . . . . . . . . . . . . . . . . . . . . 41
CoreCFI Handbook v2.0
3
Table of Contents
B Product Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Customer Service . . . . . . . . . . . . . . . . . .
Actel Customer Technical Support Center . . . . .
Actel Technical Support . . . . . . . . . . . . . .
Website . . . . . . . . . . . . . . . . . . . . . . .
Contacting the Customer Technical Support Center
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43
43
43
43
43
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
4
CoreCFI Handbook v2.0
Introduction
Core Overview
CoreCFI (Common Flash Interface) provides an industry standard external interface to the embedded Flash memory
blocks within the Fusion family of Actel devices. Using CoreCFI, the user is able to communicate (i.e., read, write, and
erase) with the embedded Flash memory. This IP block is targeted to provide a functional subset of CoreCFI with a
design emphasis given to minimizing design size. Note that this handbook focuses on the operation of CoreCFI and
does not provide detail on the structure or the behavior of the Fusion Flash memory. Refer to the
Fusion Family of
Mixed-Signal Flash FPGAs
datasheet for details on the Fusion Flash memory. Note that CoreCFI has been designed to
be used with an external device, though it can be adapted for use with user-created custom logic within the Fusion
FPGA fabric.
CoreCFI has two top-level parameters (Verilog) or generics (VHDL) used to configure the core. For a detailed
description of the parameters/generics, refer to
Table 3-1 on page 11.
CoreCFI block diagram is shown in
Figure 1.
A
typical application using CoreCFI is shown in
Figure 2 on page 6.
Note that the D pin output enable signal is inverted.
A[17:0]
DQ_IN[31:0]
DQ_OUT[31:0]
CFI
Interface
DQ_OE_N
BYTE_N
WORD_N
CE_N
OE_N
WE_N
RP_N
RY_BY_N
CFI Interface FSM
FM_ADDRESS[17:0]
FM_DATA_IN[31:0]
FM_DATA_WIDTH[1:0]
FM_DATA_OUT[31:0]
FM_STATUS[1:0]
Flash Memory
Control Logic
FM_READ
FM_WRITE
FM_PROGRAM
FM_ERASE_PAGE
FM_OVERWRITE_PROTECT
FM_UNPROTECT_PAGE
FM_DISCARD_PAGE
FM_SPARE_PAGE
FM_PAGE_STATUS
FM_BUSY
Flash
Memory
Interface
CLK
CoreCFI
Figure 1 · CoreCFI Block Diagram
CoreCFI Handbook v2.0
5
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