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MX25V4035: 产品描述4M-bit [x 1/x 2/x 4] 2.5V cmos serial flash; 文件大小2MB，共54页; 制造商Macronix; 官网地址http://www.macronix.com/en-us/Pages/default.aspx

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MX25V4035概述

4M-bit [x 1/x 2/x 4] 2.5V cmos serial flash

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MX25V4035

MX25V8035

MX25V4035/MX25V8035

DATASHEET

P/N: PM1468

REV. 0.01, FEB. 13, 2009

MX25V4035

MX25V8035

Contents

FEATURES .................................................................................................................................................................. 5

GENERAL DESCRIPTION ......................................................................................................................................... 7

Table 1. Additional Feature Comparison ................................................................................................................... 7

PIN CONFIGURATIONS ............................................................................................................................................. 8

PIN DESCRIPTION ...................................................................................................................................................... 8

BLOCK DIAGRAM....................................................................................................................................................... 9

DATA PROTECTION.................................................................................................................................................. 10

Table 2. Protected Area Sizes................................................................................................................................. 11

Table 3. 512-bit Secured OTP Definition

................................................................................................................ 11

Memory Organization ............................................................................................................................................... 12

Table 4-1. Memory Organization (4Mb) ................................................................................................................. 12

Table 4-2. Memory Organization (8Mb) ................................................................................................................. 13

DEVICE OPERATION ................................................................................................................................................ 14

Figure 1. Serial Modes Supported .......................................................................................................................... 14

COMMAND DESCRIPTION ....................................................................................................................................... 15

Table 5. Command Set ........................................................................................................................................... 15

(1) Write Enable (WREN) ....................................................................................................................................... 17

(2) Write Disable (WRDI) ........................................................................................................................................ 17

(3) Read Identification (RDID)

................................................................................................................................ 17

(4) Read Status Register (RDSR)........................................................................................................................... 18

(5) Write Status Register (WRSR) .......................................................................................................................... 19

Table 6. Protection Modes ...................................................................................................................................... 19

(6) Read Data Bytes (READ) .................................................................................................................................. 20

(7) Read Data Bytes at Higher Speed (FAST_READ) ............................................................................................ 20

(8) 2 x I/O Read Mode (2READ) ............................................................................................................................. 20

(9) 4 x I/O Read Mode (4READ) ............................................................................................................................. 21

(10) Sector Erase (SE) ........................................................................................................................................... 21

(11) Block Erase (BE32K) ....................................................................................................................................... 22

(12) Block Erase (BE) ............................................................................................................................................. 22

(13) Chip Erase (CE) .............................................................................................................................................. 22

(14) Page Program (PP) ......................................................................................................................................... 23

(15) 4 x I/O Page Program (4PP) ........................................................................................................................... 23

(16) Continuously program mode (CP mode) ......................................................................................................... 23

(17) Deep Power-down (DP) .................................................................................................................................. 24

(18) Release from Deep Power-down (RDP), Read Electronic Signature (RES) ................................................... 24

(19) Read Electronic Manufacturer ID & Device ID (REMS), (REMS2), (REMS4) ................................................. 25

Table 7. ID Definitions

............................................................................................................................................ 25

P/N: PM1468

REV. 0.01, FEB. 13, 2009

MX25V4035

MX25V8035

(20) Enter Secured OTP (ENSO) ........................................................................................................................... 26

(21) Exit Secured OTP (EXSO) .............................................................................................................................. 26

(22) Read Security Register (RDSCUR)................................................................................................................. 26

Table 8. Security Register Definition

....................................................................................................................... 27

(23) Write Security Register (WRSCUR) ................................................................................................................ 27

(24) HOLD# pin function enable (HDE) .................................................................................................................. 27

POWER-ON STATE ................................................................................................................................................... 28

ELECTRICAL SPECIFICATIONS .............................................................................................................................. 29

ABSOLUTE MAXIMUM RATINGS ......................................................................................................................... 29

Figure 2.Maximum Negative Overshoot Waveform ................................................................................................ 29

CAPACITANCE TA = 25°C, f = 1.0 MHz ................................................................................................................. 29

Figure 3. Maximum Positive Overshoot Waveform................................................................................................. 29

Figure 4. INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL .................................................................. 30

Figure 5. OUTPUT LOADING ................................................................................................................................ 30

Table 9. DC CHARACTERISTICS (Temperature = -40°C to 85°C, VCC = 2.25V ~ 2.75V) .................................. 31

Table 10. AC CHARACTERISTICS (Temperature = -40°C to 85°C, VCC = 2.25V ~ 2.75V) ................................ 32

Timing Analysis ........................................................................................................................................................ 34

Figure 6. Serial Input Timing ................................................................................................................................... 34

Figure 7. Output Timing .......................................................................................................................................... 34

Figure 8. WP# Setup Timing and Hold Timing during WRSR when SRWD=1 ....................................................... 35

Figure 9. Hardware Reset Timing ........................................................................................................................... 35

Figure 10. Write Enable (WREN) Sequence (Command 06) ................................................................................. 36

Figure 11. Write Disable (WRDI) Sequence (Command 04) .................................................................................. 36

Figure 12. Read Identification (RDID) Sequence (Command 9F)

.......................................................................... 36

Figure 13. Read Status Register (RDSR) Sequence (Command 05)..................................................................... 37

Figure 14. Write Status Register (WRSR) Sequence (Command 01) ................................................................... 37

Figure 15. Read Data Bytes (READ) Sequence (Command 03) ........................................................................... 37

Figure 16. Read at Higher Speed (FAST_READ) Sequence (Command 0B) ....................................................... 38

Figure 17. 2 x I/O Read Mode Sequence (Command BB) ..................................................................................... 39

Figure 18. 4 x I/O Read Mode Sequence (Command EB) ..................................................................................... 39

Figure 19. 4 x I/O Read enhance performance Mode Sequence (Command EB) ................................................. 40

Figure 20. Page Program (PP) Sequence (Command 02) .................................................................................... 41

Figure 21. 4 x I/O Page Program (4PP) Sequence (Command 38) ...................................................................... 41

Figure 22. Continously Program (CP) Mode Sequence with Hardware Detection (Command AD) ....................... 42

Figure 23. Sector Erase (SE) Sequence (Command 20) ...................................................................................... 42

Figure 24. Block Erase 32KB (BE32K) Sequence (Command 52) ........................................................................ 43

Figure 25. Block Erase (BE) Sequence (Command D8) ....................................................................................... 43

Figure 26. Chip Erase (CE) Sequence (Command 60 or C7) ............................................................................... 43

Figure 27. Deep Power-down (DP) Sequence (Command B9) ............................................................................. 44

Figure 28. Release from Deep Power-down and Read Electronic Signature (RES) Sequence (Command AB) .. 44

P/N: PM1468

REV. 0.01, FEB. 13, 2009

MX25V4035

MX25V8035

Figure 29. Release from Deep Power-down (RDP) Sequence (Command AB) .................................................... 45

Figure 30. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90 or EF or DF) .............. 45

Figure 31. Power-up Timing.................................................................................................................................... 46

Table 11. Power-Up Timing and VWI Threshold ..................................................................................................... 46

INITIAL DELIVERY STATE ..................................................................................................................................... 46

RECOMMENDED OPERATING CONDITIONS ......................................................................................................... 47

Figure A. AC Timing at Device Power-Up ............................................................................................................... 47

ERASE AND PROGRAMMING PERFORMANCE .................................................................................................... 48

LATCH-UP CHARACTERISTICS .............................................................................................................................. 48

ORDERING INFORMATION ...................................................................................................................................... 49

PART NAME DESCRIPTION ..................................................................................................................................... 50

PACKAGE INFORMATION ........................................................................................................................................ 51

REVISION HISTORY ................................................................................................................................................. 53

P/N: PM1468

REV. 0.01, FEB. 13, 2009

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描述	4M-bit [x 1/x 2/x 4] 2.5V cmos serial flash	4M-BIT [x 1/x 2/x 4] 2.5V CMOS SERIAL FLASH	4M-bit [x 1/x 2/x 4] 2.5V cmos serial flash	4M-bit [x 1/x 2/x 4] 2.5V cmos serial flash

MX25V4035

MX25V4035概述

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