Freescale Semiconductor
Technical Data
Document Number: MHVIC2114NR2
Rev. 5, 5/2006
RF LDMOS Wideband Integrated
Power Amplifier
The MHVIC2114NR2 wideband integrated circuit is designed for base station
applications. It uses Freescale’s newest High Voltage (26 to 28 Volts) LDMOS
IC technology and integrates a multi - stage structure. Its wideband On - Chip
matching design makes it usable from 1600 to 2600 MHz. The linearity
performances cover all modulation formats for cellular applications: CDMA and
W - CDMA. The device is in a PFP - 16 flat pack package that provides
excellent thermal performance through a solderable backside contact.
Final Application
•
Typical Two - Tone Performance: V
DD
= 27 Volts, I
DQ1
= 95 mA, I
DQ2
=
204 mA, I
DQ3
= 111 mA, P
out
= 15 Watts PEP, Full Frequency Band
Power Gain — 32 dB
IMD — - 30 dBc
Driver Application
•
Typical Single - Channel W - CDMA Performance: V
DD
= 27 Volts, I
DQ1
=
96 mA, I
DQ2
= 204 mA, I
DQ3
= 111 mA, P
out
= 23 dBm, 2110 - 2170 MHz,
3GPP Test Model 1, Measured in 3.84 MHz BW @ 5 MHz Offset, 64
DTCH, PAR = 8.5 dB @ 0.01% Probability on CCDF.
Power Gain — 32 dB
ACPR — - 58 dBc
•
P1dB = 14 Watts, Gain Flatness = 0.2 dB from 2110 to 2170 MHz
•
Capable of Handling 3:1 VSWR, @ 27 Vdc, 2140 MHz, 15 Watts CW
Output Power
Features
•
Characterized with Series Equivalent Large - Signal Impedance Parameters
and Common Source Scattering Parameters
•
On - Chip Matching (50 Ohm Input, DC Blocked, >5 Ohm Output)
•
Integrated Temperature Compensation with Enable/Disable Function
•
Integrated ESD Protection
•
RoHS Compliant
•
In Tape and Reel. R2 Suffix = 1,500 Units per 16 mm, 13 inch Reel.
MHVIC2114NR2
2100 MHz, 27 V, 23 dBm
SINGLE W - CDMA
RF LDMOS WIDEBAND
INTEGRATED POWER AMPLIFIER
16
1
CASE 978 - 03
PFP - 16
N.C.
V
GS3
V
GS2
V
GS1
V
GS3
Quiescent Current
Temperature Compensation
V
GS2
V
GS1
RF
in
RF
in
I
C
V
DS3
/RF
out
RF
in
V
DS1
V
DS2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
N.C.
V
DS3
/RF
out
V
DS3
/RF
out
V
DS3
/RF
out
V
DS3
/RF
out
V
DS3
/RF
out
V
DS3
/RF
out
N.C.
V
DS1
V
DS2
3 Stages I
C
(Top View)
Note: Exposed backside flag is source
terminal for transistors.
Figure 1. Block Diagram
Figure 2. Pin Connections
©
Freescale Semiconductor, Inc., 2006. All rights reserved.
MHVIC2114NR2
1
RF Device Data
Freescale Semiconductor
Table 1. Maximum Ratings
Rating
Drain- Source Voltage
Gate- Source Voltage
Storage Temperature Range
Operating Junction Temperature
Input Power
Symbol
V
DSS
V
GS
T
stg
T
J
P
in
Value
- 0.5, +65
- 0.5, +15
- 65 to +150
150
5
Unit
Vdc
Vdc
°C
°C
dBm
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Driver Application
(P
out
= +0.2 W CW)
Stage 1, 27 Vdc, I
DQ1
= 96 mA
Stage 2, 27 Vdc, I
DQ2
= 204 mA
Stage 3, 27 Vdc, I
DQ3
= 111 mA
Symbol
R
θJC
11.5
7.52
5.52
Value
Unit
°C/W
Table 3. ESD Protection Characteristics
Test Methodology
Human Body Model (per JESD22 - A114)
Machine Model (per EIA/JESD22 - A115)
Charge Device Model (per JESD22 - C101)
Class
0 (Minimum)
A (Minimum)
II (Minimum)
Table 4. Moisture Sensitivity Level
Test Methodology
Per JESD 22 - A113, IPC/JEDEC J - STD - 020
Rating
3
Package Peak Temperature
260
Unit
°C
Table 5. Electrical Characteristics
(T
C
= 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
W - CDMA Characteristics
(In Freescale Test Fixture, 50 ohm system) V
DD
= 27 Vdc, I
DQ1
= 96 mA, I
DQ2
= 204 mA, I
DQ3
= 111 mA,
P
out
= 23 dBm, 2110- 2170 MHz, Single - Carrier W - CDMA, 3.84 MHz Channel Bandwidth Carrier. ACPR measured in 3.84 MHz Channel
Bandwidth @
±5
MHz Offset. PAR = 8.5 dB @ 0.01% Probability on CCDF.
Power Gain
Gain Flatness
Input Return Loss
Adjacent Channel Power Ratio
Group Delay
Phase Linearity
G
ps
G
F
IRL
ACPR
Delay
—
29
—
—
—
—
—
32
0.3
- 13
- 60
1.7
0.2
36
0.5
- 10
- 57
—
—
dB
dB
dB
dBc
ns
°
MHVIC2114NR2
2
RF Device Data
Freescale Semiconductor
1
V
GS3
R3
V
GS2
R2
V
GS1
R1
RF
INPUT
16
V
DS3
+
C1
C2
2
15
C17
C18
+
C19
+
C20
+
C5
C3
3
14
Z4
4
13
C15
RF
OUTPUT
+
C14
C4
5
12
Z2
C9
6
11
C16
Z5
Z3
Z1
C22
V
DS1
+
C21
V
DS2
+
C8
C7
C6
7
Quiescent Current
Temperature Compensation
10
+
C13
+
C12
C11
C10
8
9
Z1
Z2
Z3
Z4
Z5
PCB
0.323″ x .055″ 50
Ω
Microstrip
0.196″ x .176″ Microstrip
0.286″ x .055″ Microstrip
0.150″ x .018″ Microstrip
0.363″ x .055″ Microstrip
Arlon, 0.021″,
ε
r
= 2.55
Figure 3. MHVIC2114NR2 Test Circuit Schematic
Table 6. MHVIC2114NR2 Test Circuit Component Designations and Values
Part
C1, C5, C8, C12, C14, C19
C2, C3, C4, C7, C11, C18
C6, C10, C17
C9
C15, C16
C22
C13, C20, C21
R1, R2, R3
Description
1
μF
Tantalum Chip Capacitors
0.01
μF
Chip Capacitors
6.8 pF Chip Capacitors (ACCU - P)
1.5 pF Chip Capacitor (ACCU - P)
2.2 pF Chip Capacitors (ACCU - P)
1.0 pF Chip Capacitor (ACCU - P)
330
μF
Electrolytic Capacitors
1 kW Chip Resistors (0805)
Part Number
TAJA105K035R
0805C103K5RACTR
AVX08051J6R8BBT
AVX08051J1R5BBT
AVX08051J2R2BBT
AVX08051J1R0BBT
MCR35V337M10X16
P1.00KCCT- ND
Manufacturer
Kemet
Vishay
AVX
AVX
AVX
AVX
Multicomp
Panasonic
MHVIC2114NR2
RF Device Data
Freescale Semiconductor
3
V
GS1
R1
C14
V
GS2
R2
R3
V
GS3
C5
C3
C4
C2
C1
C15
C9
C16
MHVIC2114R2
Rev 1
C22
C6
C10
C17
C11
C12
C7
C8
V
DD1
V
DD2
C18 C19
V
DD3
C21
C13
C20
Freescale has begun the transition of marking Printed Circuit Boards (PCBs) with the
Freescale Semiconductor signature/logo. PCBs may have either Motorola or
Freescale markings during the transition period. These changes will have no impact
on form, fit or function of the current product.
Figure 4. MHVIC2114NR2 Test Circuit Component Layout
MHVIC2114NR2
4
RF Device Data
Freescale Semiconductor
TYPICAL CHARACTERISTICS
40
30
20
S21 (dB)
10
0
−10
−20
V
DD
= 27 Vdc, P
out
= 23 dBm CW
S11
S21
0
−5
−10
DELAY, (nSEC)
−15
−20
−25
−30
S11 (dB)
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
I
DQ1
= 96 mA, I
DQ2
= 204 mA, I
DQ3
= 111 mA
−30
−35
1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000
f, FEQUENCY (MHz)
1.3
1.2
2100
−30_C
V
DD
= 27 Vdc, P
out
= 23 dBm CW
I
DQ1
= 96 mA, I
DQ2
= 204 mA, I
DQ3
= 111 mA
2110
2120
2130
2140
2150
2160
2170
2180
25_C
T
C
= 85_C
f, FREQUENCY (MHz)
Figure 5. Broadband Frequency Response
Figure 6. Delay versus Frequency
40
IRL, INPUT RETURN LOSS (dB)
−18
−17
−16
−15
25_C
−14
−13
−12
−11
2160
2170
2180
−30_C
T
C
= 85_C
V
DD
= 27 Vdc, P
out
= 23 dBm CW
I
DQ1
= 96 mA, I
DQ2
= 204 mA, I
DQ3
= 111 mA
G ps , POWER GAIN (dB)
36
T
C
= −30_C
32
25_C
28
85_C
24
V
DD
= 27 Vdc, P
out
= 23 dBm CW
20
2100
I
DQ1
= 96 mA, I
DQ2
= 204 mA, I
DQ3
= 111 mA
2110
2120
2130
2140
2150
−10
2100
2110
2120
2130
2140
2150
2160
2170
2180
f, FREQUENCY (MHz)
f, FREQUENCY, (MHz)
Figure 7. Power Gain versus Frequency
Figure 8. Input Return Loss versus Frequency
40
38
36
G ps , POWER GAIN (dB)
34
32
30
28
26
24
22
20
15
V
DD
= 27 Vdc, f = 2140 MHz
I
DQ1
= 96 mA, I
DQ2
= 204 mA, I
DQ3
= 111 mA
17.5
20
22.5
25
27.5
30
32.5
35
37.5
40
85_C
S21 PHASE(_)
25_C
T
C
= −30_C
−10
−20
T
C
= −30_C
−30
25_C
40
−50
−60
15
85_C
V
DD
= 27 Vdc, f = 2140 MHz
I
DQ1
= 96 mA, I
DQ2
= 204 mA, I
DQ3
= 111 mA
20
25
30
35
40
45
P
out
, OUTPUT POWER (dBm)
P
out
, OUTPUT POWER (dBm)
Figure 9. Power Gain versus Output Power
Figure 10. S21 Phase versus Output Power
MHVIC2114NR2
RF Device Data
Freescale Semiconductor
5
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