Supertex inc.
Universal High Brightness
LED Driver
Features
►
Switch mode controller for single switch LED
drivers
►
Enhanced drop-in replacement to the HV9910B
►
Open loop peak current controller
►
Internal 15 to 450V linear regulator
►
Constant frequency or constant off-time operation
►
Linear and PWM dimming capability
►
Requires few external components for operation
►
Over-temperature protection
HV9910C
General Description
Applications
►
►
►
►
►
►
DC/DC or AC/DC LED driver applications
RGB backlighting LED driver
Back lighting of flat panel displays
General purpose constant current source
Signage and decorative LED lighting
Chargers
The HV9910C is an open loop, current mode, control LED driver
IC. The HV9910C can be programmed to operate in either a
constant frequency or constant off-time mode. It includes a
15 – 450V linear regulator which allows it to work from a wide
range of input voltages without the need for an external low
voltage supply. HV9910C includes a TTL compatible PWM
dimming input that can accept an external control signal with a
duty ratio of 0 – 100% and a frequency of up to a few kilohertz.
It also includes a 0 – 250mV linear dimming input which can
be used for linear dimming of the LED current. As opposed to
the HV9910B, the HV9910C is equipped with built-in thermal-
shutdown protection.
The HV9910C is ideally suited for buck LED drivers. Since
the HV9910C operates in open loop current mode control, the
controller achieves good output current regulation without the
need for any loop compensation. Also, being an open loop
controller, PWM dimming response is limited only by the rate
of rise of the inductor current, enabling a very fast rise and fall
times of the LED current. The HV9910C requires only three
external components (apart from the power stage) to produce
a controlled LED current making it an ideal solution for low cost
LED drivers.
Typical Application Circuit
C
IN
D1
C
DD
VDD
LD
VIN
C
O
L1
HV9910C
GATE
CS
GND
Q1
PWMD
RT
R
OSC
R
CS
Doc.# DSFP-HV9910C
A030614
Supertex inc.
www.supertex.com
HV9910C
Ordering Information
Part Number
HV9910CLG-G
HV9910CNG-G
HV9910CNG-G M934
HV9910CSG-G
Package Option
8-Lead SOIC
16-Lead SOIC
16-Lead SOIC
8-Lead SOIC
(w/heat slug)
Packing
2500/Reel
45/Tube
2500/Reel
VIN
1
8
RT
7
LD
6
VDD
5
PWMD
Pin Description
VIN
1
NC
2
NC
3
CS
4
GND
5
NC
6
NC
7
GATE
8
16
15
14
13
12
11
10
9
NC
NC
RT
LD
VDD
NC
NC
PWMD
2500/Reel
CS
2
GND
3
GATE
4
-G denotes a lead (Pb)-free / RoHS compliant package
Absolute Maximum Ratings
Parameter
V
IN
to GND
V
DD
to GND
CS, LD, PWMD, GATE
Junction temperature range
Storage temperature range
Continuous power dissipation
(T
A
= +25°C)
8-Lead SOIC
16-Lead SOIC
8-Lead SOIC (w/heat slug)
Value
-0.5V to +470V
12V
-0.3V to (V
DD
+0.3V)
-40°C to +125°C
-65°C to +150°C
650mW
1300mW
1300mW
8-Lead SOIC
16-Lead SOIC
Product Marking
9910C
YWW
LLLL
Y = Last Digit of Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging
Package may or may not include the following marks: Si or
8-Lead SOIC
Top Marking
YWW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
HV9910CNG
LLLLLLLL
Bottom Marking
CCCCCCCCC AAA
Thermal Resistance
Package
8-Lead SOIC
16-Lead SOIC
8-Lead SOIC (w/heat slug)
θ
ja
101°C/W
83°C/W
84°C/W
Y = Last Digit of Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
Package may or may not include the following marks: Si or
16-Lead SOIC
Electrical Characteristics
(The specifications are at T
= 25°C and V
A
IN
= 15V, unless otherwise noted.)
Sym
Description
Input DC supply voltage range
1
Supply current
Shut-down mode supply current
*
-
-
Min
15
-
-
Typ
-
0.8
0.5
Max
450
1.5
1.0
Units
V
mA
mA
Conditions
DC input voltage
Pin PWMD to VDD, no capacitance
at GATE
Pin PWMD to GND
Input
V
INDC
I
IN(MAX)
I
INSD
Notes:
1. Also limited by package power dissipation limit, whichever is lower.
*
Denotes the specifications which apply over the full operating ambient temperature range of -40°C < T
A
< +125°C.
# Guaranteed by design.
Doc.# DSFP-HV9910C
A030614
2
Supertex inc.
www.supertex.com
HV9910C
Electrical Characteristics
(cont.)
(The specifications are at T
= 25°C and V
A
IN
= 15V, unless otherwise noted.)
Sym
Description
Min
Typ
Max
Units
Conditions
V
IN
= 15V, I
DD(ext)
= 0, PWMD = VDD,
500pF at GATE; R
OSC
= 249kΩ
V
IN
= 15 - 450V, I
DD(ext)
= 0, PWMD =
VDD, 500pF at GATE; R
OSC
= 249kΩ
I
DD(ext)
= 0 - 1.0mA, PWMD = VDD,
500pF at GATE; R
OSC
= 249kΩ
V
DD
rising
V
DD
falling
V
DD
= UVLO - ∆UVLO
V
IN
= 15 - 450V
V
IN
= 15 - 450V
V
PWMD
= 5.0V
Internal Regulator
V
DD
ΔV
DD, line
ΔV
DD, load
UVLO
∆UVLO
I
IN(MAX)
V
EN(lo)
V
EN(hi)
R
EN
Internally regulated voltage
Line regulation of V
DD
Load regulation of V
DD
V
DD
undervoltage lockout threshold
V
DD
undervoltage lockout hysteresis
Maximum regulator current
PWMD input low voltage
PWMD input high voltage
Internal pull-down resistance
at PWMD
Current sense pull-in threshold
voltage
Offset voltage for LD comparator
Current sense blanking interval
-
Delay to output
-
145
-
215
80
315
150
ns
-
-
-
*
-
#
*
*
-
7.25
0
0
6.45
-
5.0
-
2.4
50
7.50
-
-
6.70
500
-
-
-
100
7.75
1.0
0.1
6.95
-
-
1.0
-
150
V
V
V
V
mV
mA
V
V
kΩ
PWM Dimming
Current Sense Comparator
V
CS
V
OFFSET
T
BLANK
-
*
-
225
-12
150
250
-
215
275
+12
280
ns
mV
mV
-40°C < T
A
< +125°C
---
0 < T
A
< +85
O
C, V
LD
= V
DD
,
V
CS
= V
CS,TH
+ 50mV after T
BLANK
-40 < T
A
< +125
O
C, V
LD
= V
DD
,
V
CS
= V
CS,TH
+ 50mV after T
BLANK
V
IN
= 15V, V
LD
= 0.15,
V
CS
= 0 to 0.22V after t
BLANK
t
DELAY
Oscillator
f
OSC
Oscillator frequency
-
-
-
-
#
#
-
-
-
20
80
0.165
0.165
-
-
128
10
-
25
100
-
-
30
30
-
-
-
30
120
-
-
50
50
150
30
350
kHz
R
OSC
= 1.00MΩ
R
OSC
= 249kΩ
V
GATE
= 0V
V
GATE
= V
DD
C
GATE
= 500pF
C
GATE
= 500pF
---
---
---
GATE Driver
I
SOURCE
I
SINK
t
RISE
t
FALL
T
SD
∆T
SD
I
SD
Maximum GATE sourcing current
Maximum GATE sinking current
GATE output rise time
GATE output fall time
Shut-down temperature
Hysteresis
TSD-mode V
IN
current
A
A
ns
ns
O
O
Over-Temperature Protection
C
C
μA
Notes:
1. Also limited by package power dissipation limit, whichever is lower.
*
Denotes the specifications which apply over the full operating ambient temperature range of -40°C < T
A
< +125°C.
# Guaranteed by design.
Doc.# DSFP-HV9910C
A030614
3
Supertex inc.
www.supertex.com
HV9910C
Application Information
The HV9910C is optimized to drive buck LED drivers using
open-loop peak current mode control. This method of control
enables fairly accurate LED current control without the need
for high side current sensing or the design of any closed loop
controllers. The IC uses very few external components and
enables both Linear and PWM dimming of the LED current.
A resistor connected to the RT pin programs the frequency
of operation (or the off-time). The oscillator produces pulses
at regular intervals. These pulses set the SR flip-flop in the
HV9910C which causes the GATE driver to turn on. The same
pulses also start the blanking timer which inhibits the reset
input of the SR flip flop and prevent false turn-offs due to the
turn-on spike. When the FET turns on, the current through
the inductor starts ramping up. This current flows through
the external sense resistor R
cs
and produces a ramp voltage
at the CS pin. The comparators are constantly comparing
the CS pin voltage to both the voltage at the LD pin and
the internal 250mV. Once the blanking timer is complete, the
output of these comparators is allowed to reset the flip flop.
When the output of either one of the two comparators goes
high, the flip flop is reset and the GATE output goes low. The
GATE goes low until the SR flip flop is set by the oscillator.
Assuming a 30% ripple in the inductor, the current sense
resistor R
cs
can be set using:
R
CS
=
0.25V (or V
LD
)
1.15 • I
LED
is applied at the VIN pin, the HV9910C maintains a constant
7.5V at the VDD pin. This voltage is used to power the IC
and any external resistor dividers needed to control the IC.
The VDD pin must be bypassed by a low ESR capacitor to
provide a low impedance path for the high frequency current
of the output GATE driver.
The HV9910C can also be operated by supplying a voltage
at the VDD pin greater than the internally regulated voltage.
This will turn off the internal linear regulator of the IC and the
HV9910C will operate directly off the voltage supplied at the
VDD pin. Please note that this external voltage at the VDD
pin should not exceed 12V.
Although the VIN pin of the HV9910C is rated up to 450V, the
actual maximum voltage that can be applied is limited by the
power dissipation in the IC. For example, if an 8-lead SOIC
(junction to ambient thermal resistance R
θj-a
= 101°C/W)
HV9910C draws about I
IN
= 2.0mA from the VIN pin, and
has a maximum allowable temperature rise of the junction
temperature limited to ΔT = 75°C, the maximum voltage at
the VIN pin would be:
V
IN(MAX)
=
=
T
R
θja
75
O
C
1
I
IN
1
2mA
101
O
C/W
= 371V
In these cases, to operate the HV9910C from higher input
voltages, a Zener diode can be added in series with the VIN
pin to divert some of the power loss from the HV9910C to
the Zener diode. In the above example, using a 100V zener
diode will allow the circuit to easily work up to 450V.
Note:
The Zener diode will increase the minimum input
voltage required to turn on the HV9910C to 115V.
The input current drawn from the VIN pin is a sum of the
1.5mA (maximum) current drawn by the internal circuit and
the current drawn by the GATE driver (which in turn depends
on the switching frequency and the GATE charge of the
external FET).
I
IN
= 1.5mA + Q
g
• f
s
In the above equation, f
s
is the switching frequency and
Qg is the GATE charge of the external FET (which can be
obtained from the datasheet of the FET).
Constant frequency peak current mode control has an
inherent disadvantage – at duty cycles greater than 0.5,
the control scheme goes into subharmonic oscillations.
To prevent this, an artificial slope is typically added to the
current sense waveform. This slope compensation scheme
will affect the accuracy of the LED current in the present
form. However, a constant off-time peak current control
scheme does not have this problem and can easily operate
at duty cycles greater than 0.5 and also gives inherent input
voltage rejection making the LED current almost insensitive
to input voltage variations. But, it leads to variable frequency
operation and the frequency range depends greatly on the
input and output voltage variation. HV9910C makes it easy
to switch between the two modes of operation by changing
one connection (see oscillator section).
Input Voltage Regulator
The HV9910C can be powered directly from its VIN pin and
can work from 15 - 450VDC at its VIN pin. When a voltage
Doc.# DSFP-HV9910C
A030614
4
Supertex inc.
www.supertex.com
HV9910C
Current Sense
The current sense input of the HV9910C goes to the non-
inverting inputs of two comparators. The inverting terminal
of one comparator is tied to an internal 250mV reference
whereas the inverting terminal of the other comparator
is connected to the LD pin. The outputs of both these
comparators are fed into an OR GATE and the output of the
OR GATE is fed into the reset pin of the flip-flop. Thus, the
comparator which has the lowest voltage at the inverting
terminal determines when the GATE output is turned off.
The outputs of the comparators also include a 150-280ns
blanking time which prevents spurious turn-offs of the
external FET due to the turn-on spike normally present
in peak current mode control. In rare cases, this internal
blanking might not be enough to filter out the turn-on spike.
In these cases, an external RC filter needs to be added
between the external sense resistor (R
CS
) and the CS pin.
Please note that the comparators are fast (with a typical
80ns response time). A proper layout minimizing external
inductances will prevent false triggering of these comparators.
Oscillator
The oscillator in the HV9910C is controlled by a single
resistor connected at the RT pin. The equation governing
the oscillator time period T
osc
is given by:
T
osc
(µs) =
R
osc
(kΩ)
25
►
In some cases, it may not be possible to find the exact
R
CS
value required to obtain the LED current when the
internal 250mV is used. In these cases, an external
voltage divider from the VDD pin can be connected
to the LD pin to obtain a voltage (less than 250mV)
corresponding to the desired voltage across R
CS
.
►
Linear dimming may be desired to adjust the current
level to reduce the intensity of the LEDs. In these cases,
an external 0-250mV voltage can be connected to the
LD pin to adjust the LED current during operation.
To use the internal 250mV, the LD pin can be connected to
VDD.
Note:
Although the LD pin can be pulled to GND, the output
current will not go to zero. This is due to the presence of a
minimum on-time (which is equal to the sum of the blanking
time and the delay to output time) which is about 450ns.
This will cause the FET to be on for a minimum of 450ns and
thus the LED current when LD = GND will not be zero. This
current is also dependent on the input voltage, inductance
value, forward voltage of the LEDs and circuit parasitics. To
get zero LED current, the PWMD pin has to be used.
PWM Dimming
PWM Dimming can be achieved by driving the PWMD pin
with a low frequency square wave signal. When the PWM
signal is zero, the GATE driver is turned off and when the
PWMD signal if high, the GATE driver is enabled. Since the
PWMD signal does not turn off the other parts of the IC,
the response of the HV9910C to the PWMD signal is almost
instantaneous. The rate of rise and fall of the LED current
is thus determined solely by the rise and fall times of the
inductor current.
To disable PWM dimming and enable the HV9910C
permanently, connect the PWMD pin to VDD.
Over-Temperature Protection
The auto-recoverable thermal shutdown at 140°C (typ.)
junction temperature with 20°C hysteresis is featured to
avoid thermal runaway. When the junction temperature
reaches T
SD
= 140°C (typ.), the HV9910C enters a low power
consumption shut-down mode with I
IN
<350µA.
If the resistor is connected between RT and GND, HV9910C
operates in a constant frequency mode and the above equation
determines the time-period. If the resistor is connected between
RT and GATE, the HV9910C operates in a constant off-time
mode and the above equation determines the off-time.
GATE Output
The gate output of the HV9910C is used to drive an external
FET. It is recommended that the GATE charge of the external
FET be less than 25nC for switching frequencies ≤ 100kHz
and less than 15nC for switching frequencies > 100kHz.
Linear Dimming
The Linear Dimming pin is used to control the LED current.
There are two cases when it may be necessary to use the
Linear Dimming pin.
Doc.# DSFP-HV9910C
A030614
5
Supertex inc.
www.supertex.com
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