a
FEATURES
User Programmed Gains of 1 to 10,000
Low Gain Error: 0.02% Max
Low Gain TC: 5 ppm/ C Max
Low Nonlinearity: 0.001% Max
Low Offset Voltage: 25 V
Low Noise 4 nV/√Hz (at 1 kHz) RTI
Gain Bandwidth Product: 25 MHz
16-Lead Ceramic or Plastic DIP Package,
20-Terminal LCC Package
Standard Military Drawing Available
MlL-Standard Parts Available
Low Cost
–INPUT
–GAIN
SENSE
–GAIN
DRIVE
Programmable Gain
Instrumentation Amplifier
AD625
FUNCTIONAL BLOCK DIAGRAM
50
–
+
–
+
AD625
10k
SENSE
10k
–
OUTPUT
+
10k
REFERENCE
V
B
+GAIN
DRIVE
+GAIN
SENSE
+INPUT
+
–
+
50
–
10k
PRODUCT DESCRIPTION
PRODUCT HIGHLIGHTS
The AD625 is a precision instrumentation amplifier specifically
designed to fulfill two major areas of application: 1) Circuits re-
quiring nonstandard gains (i.e., gains not easily achievable with
devices such as the AD524 and AD624). 2) Circuits requiring a
low cost, precision software programmable gain amplifier.
For low noise, high CMRR, and low drift the AD625JN is the
most cost effective instrumentation amplifier solution available.
An additional three resistors allow the user to set any gain from
1 to 10,000. The error contribution of the AD625JN is less than
0.05% gain error and under 5 ppm/°C gain TC; performance
limitations are primarily determined by the external resistors.
Common-mode rejection is independent of the feedback resistor
matching.
A software programmable gain amplifier (SPGA) can be config-
ured with the addition of a CMOS multiplexer (or other switch
network), and a suitable resistor network. Because the ON
resistance of the switches is removed from the signal path, an
AD625 based SPGA will deliver 12-bit precision, and can be
programmed for any set of gains between 1 and 10,000, with
completely user selected gain steps.
For the highest precision the AD625C offers an input offset
voltage drift of less than 0.25
µV/°C,
output offset drift below
15
µV/°C,
and a maximum nonlinearity of 0.001% at G = 1. All
grades exhibit excellent ac performance; a 25 MHz gain band-
width product, 5 V/µs slew rate and 15
µs
settling time.
The AD625 is available in three accuracy grades (A, B, C) for
industrial (–40°C to +85°C) temperature range, two grades (J,
K) for commercial (0°C to +70°C) temperature range, and one
(S) grade rated over the extended (–55°C to +125°C) tempera-
ture range.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
1. The AD625 affords up to 16-bit precision for user selected
fixed gains from 1 to 10,000. Any gain in this range can be
programmed by 3 external resistors.
2. A 12-bit software programmable gain amplifier can be config-
ured using the AD625, a CMOS multiplexer and a resistor
network. Unlike previous instrumentation amplifier designs,
the ON resistance of a CMOS switch does not affect the gain
accuracy.
3. The gain accuracy and gain temperature coefficient of the
amplifier circuit are primarily dependent on the user selected
external resistors.
4. The AD625 provides totally independent input and output
offset nulling terminals for high precision applications. This
minimizes the effects of offset voltage in gain-ranging
applications.
5. The proprietary design of the AD625 provides input voltage
noise of 4 nV/√Hz at 1 kHz.
6. External resistor matching is not required to maintain high
common-mode rejection.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
AD625
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
18 V
Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . . . 450 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . .
±
V
S
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range (D, E) . . . . . . . . –65°C to +150°C
Storage Temperature Range (N) . . . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD625J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
AD625A/B/C . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
AD625S . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model
AD625AD
AD625BD
AD625BD/+
AD625CD
AD625SD
AD625SD/883B
AD625SE/883B
AD625JN
AD625KN
AD625ACHIPS
AD625SCHIPS
5962-87719012A*
5962-8771901EA*
Temperature Range
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
Package Description
16-Lead Ceramic DIP
16-Lead Ceramic DIP
16-Lead Ceramic DIP
16-Lead Ceramic DIP
16-Lead Ceramic DIP
16-Lead Ceramic DIP
20-Terminal Leadless Chip Carrier
16-Lead Plastic DIP
16-Lead Plastic DIP
Die
Die
20-Terminal Leadless Chip Carrier
16-Lead Ceramic DIP
Package Option
D-16
D-16
D-16
D-16
D-16
D-16
E-20A
N-16
N-16
E-20A
D-16
*Standard Military Drawing Available
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD625 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
PIN CONNECTIONS
Ceramic DIP (D) and Plastic DIP (N) Packages
Leadless Chip Carrier (E) Package
+GAIN SENSE
+INPUT 1
+GAIN SENSE 2
RTI NULL
+V
S
10k
4
3
16 –INPUT
15 –GAIN SENSE
14
RTO NULL
10k
–V
S
RTI NULL
RTO NULL
TOP VIEW
+GAIN DRIVE 5 (Not to Scale) 12 –GAIN DRIVE
NC 6
REFERENCE 7
–V
S
8
11 SENSE
10 V
OUT
9 +V
S
AD625
13
3 2
RTI NULL 4
RTI NULL 5
NC 6
+GAIN DRIVE 7
NC 8
1 20 19
18 RTO NULL
–GAIN SENSE
+INPUT
–INPUT
NC
AD625
TOP VIEW
(Not to Scale)
17 RTO NULL
16 NC
15 –GAIN NULL
14 SENSE
NC = NO CONNECT
9 10 11 12 13
REFERENCE
–V
S
V
OUT
NC
+V
S
NC = NO CONNECT
–4–
REV. D
Typical Performance Characteristics–AD625
20
V
20
OUTPUT VOLTAGE SWING – V p-p
30
V
INPUT VOLTAGE RANGE –
15
OUTPUT VOLTAGE SWING –
15
20
10
25 C
5
10
10
5
0
0
5
10
15
SUPPLY VOLTAGE – V
20
0
0
5
10
15
SUPPLY VOLTAGE – V
20
0
10
100
1k
LOAD RESISTANCE –
10k
Figure 1. Input Voltage Range vs.
Supply Voltage, G = 1
Figure 2. Output Voltage Swing
vs. Supply Voltage
Figure 3. Output Voltage Swing
vs. Load Resistance
–160
G = 1000
G = 100
G = 10
G=1
30
FULL POWER RESPONSE – V p-p
–140
–120
G = 1, 100
20
GAIN
1000
CMRR – dM
–100
–80
–60
–40
–20
0
0
BANDWIDTH
LIMITED
G = 500
10
G = 100
100
10
1
10
100
1k
10k
FREQUENCY – Hz
100k
10M
0
1k
G = 1000
10k
100k
FREQUENCY – Hz
1M
100
1k
10k
100k
FREQUENCY – Hz
1M
10M
Figure 4. CMRR vs. Frequency
RTI, Zero to 1 k
Ω
Source Imbal-
ance
Figure 5. Large Signal Frequency
Response
Figure 6. Gain vs. Frequency
–1
160
160
POWER SUPPLY REJECTION – dB
POWER SUPPLY REJECTION – dB
V
OS
FROM FINAL VALUE – V
0
1
2
3
4
5
6
7
140
120
G = 500
G = 100
–V
S
= –15V dc+
1V p-p SINEWAVE
140
120
G = 500
G = 100
+V
S
= +15V dc+
1V p-p SINEWAVE
100
80
60
40
20
0
G=1
100
80
60
40
20
0
G=1
0
1.0
2.0 3.0 4.0 5.0 6.0
WARM-UP TIME – Minutes
7.0
8.0
10
100
1k
10k
FREQUENCY – Hz
100k
10
100
1k
10k
FREQUENCY – Hz
100k
Figure 7. Offset Voltage, RTI, Turn
On Drift
Figure 8. Negative PSRR vs.
Frequency
Figure 9. Positive PSRR vs.
Frequency
REV. D
–5–
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