Multiplier, 12-Bit, CMOS, CPGA121, CERAMIC, PGA-121
| 参数名称 | 属性值 |
| 是否Rohs认证 | 不符合 |
| 零件包装代码 | PGA |
| 包装说明 | PGA, PGA120,13X13 |
| 针数 | 121 |
| Reach Compliance Code | unknow |
| ECCN代码 | 3A001.A.2.C |
| 其他特性 | 3 X 12 BIT DATA INPUT AND 3 X 10 BIT COEFFICIENT INP BUSES; 2 X 12 BIT AND 3 X 4 BIT DATA OUT BUSES |
| 边界扫描 | NO |
| 最大时钟频率 | 40 MHz |
| 外部数据总线宽度 | 12 |
| JESD-30 代码 | S-CPGA-P121 |
| 低功率模式 | NO |
| 湿度敏感等级 | 3 |
| 端子数量 | 121 |
| 最高工作温度 | 125 °C |
| 最低工作温度 | -55 °C |
| 输出数据总线宽度 | 12 |
| 封装主体材料 | CERAMIC, METAL-SEALED COFIRED |
| 封装代码 | PGA |
| 封装等效代码 | PGA120,13X13 |
| 封装形状 | SQUARE |
| 封装形式 | GRID ARRAY |
| 电源 | 5 V |
| 认证状态 | Not Qualified |
| 筛选级别 | MIL-STD-883 |
| 最大供电电压 | 5.5 V |
| 最小供电电压 | 4.5 V |
| 标称供电电压 | 5 V |
| 表面贴装 | NO |
| 技术 | CMOS |
| 温度等级 | MILITARY |
| 端子形式 | PIN/PEG |
| 端子节距 | 2.54 mm |
| 端子位置 | PERPENDICULAR |
| uPs/uCs/外围集成电路类型 | DSP PERIPHERAL, MULTIPLIER |
| Base Number Matches | 1 |
| 5962-9326001MXX | 5962-9326001MYX | LF2250GM33 | LF2250GM25 | |
|---|---|---|---|---|
| 描述 | Multiplier, 12-Bit, CMOS, CPGA121, CERAMIC, PGA-121 | Multiplier, 12-Bit, CMOS, CPGA120, CERAMIC, PGA-120 | Multiplier, 12-Bit, CMOS, CPGA120, CERAMIC, PGA-120 | Multiplier, 12-Bit, CMOS, CPGA120, CERAMIC, PGA-120 |
| 是否Rohs认证 | 不符合 | 不符合 | 不符合 | 不符合 |
| 零件包装代码 | PGA | PGA | PGA | PGA |
| 包装说明 | PGA, PGA120,13X13 | PGA, PGA120,13X13 | PGA, PGA120,13X13 | PGA, PGA120,13X13 |
| 针数 | 121 | 120 | 120 | 120 |
| Reach Compliance Code | unknow | unknown | unknown | unknown |
| ECCN代码 | 3A001.A.2.C | 3A001.A.2.C | 3A001.A.2.C | 3A001.A.2.C |
| 其他特性 | 3 X 12 BIT DATA INPUT AND 3 X 10 BIT COEFFICIENT INP BUSES; 2 X 12 BIT AND 3 X 4 BIT DATA OUT BUSES | 3 X 12 BIT DATA INPUT AND 3 X 10 BIT COEFFICIENT INP BUSES; 2 X 12 BIT AND 3 X 4 BIT DATA OUT BUSES | 3 X 12 BIT DATA INPUT AND 3 X 10 BIT COEFFICIENT INP BUSES; 2 X 12 BIT AND 3 X 4 BIT DATA OUT BUSES | 3 X 12 BIT DATA INPUT AND 3 X 10 BIT COEFFICIENT INP BUSES; 2 X 12 BIT AND 3 X 4 BIT DATA OUT BUSES |
| 边界扫描 | NO | NO | NO | NO |
| 最大时钟频率 | 40 MHz | 40 MHz | 30.3 MHz | 40 MHz |
| 外部数据总线宽度 | 12 | 12 | 12 | 12 |
| JESD-30 代码 | S-CPGA-P121 | S-XPGA-P120 | S-CPGA-P120 | S-CPGA-P120 |
| 低功率模式 | NO | NO | NO | NO |
| 湿度敏感等级 | 3 | 3 | 3 | 3 |
| 端子数量 | 121 | 120 | 120 | 120 |
| 最高工作温度 | 125 °C | 125 °C | 125 °C | 125 °C |
| 最低工作温度 | -55 °C | -55 °C | -55 °C | -55 °C |
| 输出数据总线宽度 | 12 | 12 | 12 | 12 |
| 封装主体材料 | CERAMIC, METAL-SEALED COFIRED | CERAMIC, METAL-SEALED COFIRED | CERAMIC, METAL-SEALED COFIRED | CERAMIC, METAL-SEALED COFIRED |
| 封装代码 | PGA | PGA | PGA | PGA |
| 封装等效代码 | PGA120,13X13 | PGA120,13X13 | PGA120,13X13 | PGA120,13X13 |
| 封装形状 | SQUARE | SQUARE | SQUARE | SQUARE |
| 封装形式 | GRID ARRAY | GRID ARRAY | GRID ARRAY | GRID ARRAY |
| 电源 | 5 V | 5 V | 5 V | 5 V |
| 认证状态 | Not Qualified | Not Qualified | Not Qualified | Not Qualified |
| 最大供电电压 | 5.5 V | 5.5 V | 5.5 V | 5.5 V |
| 最小供电电压 | 4.5 V | 4.5 V | 4.5 V | 4.5 V |
| 标称供电电压 | 5 V | 5 V | 5 V | 5 V |
| 表面贴装 | NO | NO | NO | NO |
| 技术 | CMOS | CMOS | CMOS | CMOS |
| 温度等级 | MILITARY | MILITARY | MILITARY | MILITARY |
| 端子形式 | PIN/PEG | PIN/PEG | PIN/PEG | PIN/PEG |
| 端子节距 | 2.54 mm | 2.54 mm | 2.54 mm | 2.54 mm |
| 端子位置 | PERPENDICULAR | PERPENDICULAR | PERPENDICULAR | PERPENDICULAR |
| uPs/uCs/外围集成电路类型 | DSP PERIPHERAL, MULTIPLIER | DSP PERIPHERAL, MULTIPLIER | DSP PERIPHERAL, MULTIPLIER | DSP PERIPHERAL, MULTIPLIER |
| Base Number Matches | 1 | 1 | 1 | 1 |
| JESD-609代码 | - | e0 | e0 | e0 |
| 长度 | - | 33.4899 mm | 33.4899 mm | 33.4899 mm |
| 座面最大高度 | - | 4.4196 mm | 4.4196 mm | 4.4196 mm |
| 端子面层 | - | TIN LEAD | Tin/Lead (Sn/Pb) | Tin/Lead (Sn/Pb) |
| 宽度 | - | 33.4899 mm | 33.4899 mm | 33.4899 mm |
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