Features ....................................................................................................................................................................................... 1
Typical Phase Jitter (70 fs RMS) and Phase Noise Data ............................................................................................................. 2
Ordering Information .................................................................................................................................................................... 3
LVPECL and FlexSwing Termination .................................................................................................................................. 19
LVDS, Supply Voltage: 1.8 V
±5%,
2.5 V ±10%, 3.3 V ±10%, 2.25 V to 3.63 V, 1.71 V to 3.63 V ...................................... 20
HCSL, Supply Voltage: 1.8 V
±5%,
2.5 V ±10%, 3.3 V ±10%, 2.25 V to 3.63 V, 1.71 V to 3.63 V ...................................... 20
Low-power HCSL, Supply Voltage: 1.8 V
±5%,
2.5 V ±10%, 3.3 V ±10%, 2.25 V to 3.63 V, 1.71 V to 3.63 V .................... 20
Dimensions and Patterns ― 2.0 x 1.6 mm x mm ....................................................................................................................... 21
Dimensions and Patterns ― 2.5 x 2.0 mm x mm ....................................................................................................................... 22
Dimensions and Patterns ― 3.2 x 2.5 mm x mm ....................................................................................................................... 23
Revision History ......................................................................................................................................................................... 24
Rev 0.54
Page 4 of 25
www.sitime.com
SiT9501
Ultra-low Jitter Differential XO for Standard Networking Frequencies
Electrical Characteristics
ADVANCED
All Min and Max limits in the Electrical Characteristics tables are specified over operating temperature and rated operating
voltage with standard output termination shown in the termination diagrams. Typical values are at 25°C and nominal
supply voltage.
Table 3. Electrical Characteristics – Common to All Output Signaling Types
Parameter
Output Frequency Range
Symbol
f
Min.
Typ.
Max.
Unit
MHz
Condition
Refer to frequencies listed in
Error! Not a valid result for table.
s
ection.
Inclusive of initial tolerance, operating temperature, rated power
supply voltage, load variation of 15 pF
±
10%, and 10 years
aging at 25°C
Inclusive of initial tolerance, operating temperature, rated power
supply voltage, load variation of 15 pF
±
10%, and first year aging
at 25°C
Ambient temperature of 25°C
Extended commercial, ambient temperature
Industrial, ambient temperature
Ambient temperature
Extended industrial, ambient temperature
Voltage-supply order code “YY”
Voltage-supply order code “XX”
Voltage-supply order code “18”.
Contact SiTime
for 1.5 V
Voltage-supply order code “25”
Voltage-supply order code “33”
Pins 1 and 2 for OE and SE, respectively
Pins 1 and 2 for OE and SE, respectively
Pins 1 and 2 for OE and SE, respectively
See
Figure 6
and
Figure 8
Measured from the time Vdd reaches its rated minimum value
Measured from the time OE pin toggles to enable logic level to
the time clock pins reach 90% of swing. See
Figure 13
Measured from the time OE pin toggles to disable logic level to
the last clock edge. See
Figure 14
12 kHz to 20 MHz offset frequency integration bandwidth
LED 是light emitting diode (发光二极管)的缩写,是一种由半导体技术制成的电光源。LED的核心部分是由P型半导体和N型半导体组成的晶片,在P型半导体和N型半导体之间有一个过渡层,称为P2N结。在正向导通时,半导体中的多数载流子和少数载流子复合,释放出的能量以光子或部分以光子的形式发射出来,大量的光子形成光子流,即发光。P2N结加反向电压时,少数载流子难以注入,故不发...[详细]
DSP 与 ARM 处理器
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