XC6204/XC6205
Series
High Speed LDO Regulators
Output ON-OFF Control
ETR0304_004
■GENERAL
DESCRIPTION
The XC6204/6205 series are highly precise, low noise, positive voltage LDO regulators manufactured using CMOS
processes. The series achieves high ripple rejection and low dropout and consists of a standard voltage source, an error
correction, current limiter and a phase compensation circuit plus a driver transistor.
Output voltage is selectable in 0.05V steps within a range of 0.9V ~ 6.0V.
The series is also compatible with low ESR ceramic capacitors which give added output stability. This stability can be
maintained even during load fluctuations due to the excellent transient response of the series.
The current limiter's foldback circuit also operates as a short protect for the output current limiter and the output pin.
The CE function enables the output to be turned off, resulting in greatly reduced power consumption.
■APPLICATIONS
●Mobile
phones
●Cordless
phones
●Cameras,
video recorders
●Portable
games
●Portable
AV equipment
●Reference
voltage
●Battery
powered equipment
■FEATURES
Maximum Output Current
: 150mA (300mA=XC6204 E to H TYP.)
Dropout Voltage
: 200mV @ 100mA
60mV @ 30mA
Operating Voltage
: 2V ~ 10V
Output Voltage Range
: 1.8V ~ 6.0V (XC6204) (0.05V increments)
0.9V ~ 1.75V (XC6205) (0.05V increments)
Highly Accurate
:
±2%
Low Power Consumption
: 70μA (TYP.)
Standby Current
: Less than 0.1μA (TYP.)
High Ripple Rejection
: 70dB (10kHz) (XC6204)
60dB (10kHz) (XC6205)
Operational Temperature Range
: -40℃ ~ 85℃
Low ESR Capacitor Compatible
: Ceramic capacitor
■TYPICAL
APPLICATION CIRCUIT
■TYPICAL
PERFORMANCE
CHARACTERISTICS
1/49
XC6204/XC6205
Series
■PIN
CONFIGURATION
CE 6
VSS 5
NC 4
1 VIN
2 NC
3 VOUT
SOT-25
(TOP VIEW)
SOT-89-5
(TOP VIEW)
USP-6B
(BOTTOM VIEW)
*The dissipation pad for the
USP-6B package should be
solder-plated in recommended
mount pattern and metal masking
so as to enhance mounting
strength and heal release. If the
pad needs to be connected to
other pins, it should be connected
to the V
SS
(No.5) pin.
■PIN
ASSIGNMENT
PIN NUMBER
SOT-25 SOT-89-5 USP-6B
1
2
3
4
5
4
2
3
1
5
1
5
6
2, 4
3
PIN NAME
V
IN
V
SS
CE
NC
V
OUT
FUNCTION
Input
Ground
ON/OFF Control
No Connection
Output
■FUNCTIONS
●XC6204/6205
A, B, E, F Series
CE
OPERATIONAL STATE
H
ON
L
OFF
●XC6204/6205
C, D, G, H Series
CE
OPERATIONAL STATE
H
OFF
L
ON
H= High Level
L= Low Level
2/49
XC6204/XC6205
Series
■PRODUCT
CLASSIFICATION
●Selection
Guide
The following options for the CE pin logic and internal pull-up/down are available:
High Active + no pull-down resistor built-in (standard)
High Active + 300kΩ pull-down resistor built-in <between CE-V
SS
> (semi-custom)
Low Active + no pull-up resistor built-in (semi-custom)
Low Active + 300kΩ pull-up resistor built-in <between CE-V
SS
> (semi-custom)
Note:
With the pull-up resistor or pull-down resistor built-in types, the supply current during operation will increase by V
IN
/
300kΩ (TYP.)
●Ordering
Information
XC6204/6205①②③④⑤⑥
DESIGNATOR
①
(*1)
② ③
DESCRIPTION
Type of Regulator
(CE pin Logic)
Output Voltage
SYMBOL
A/E
B/F
C/G
D/H
09 ~ 60,
2
1 (*2)
A
B (*2)
M
D
P
R
L
DESCRIPTION
: High Active, pull-down resistor built-in
: High Active, no pull-down resistor built-in
: Low Active, pull-up resistor built-in
: Low Active, no pull-up resistor built-in
: e.g. V
OUT
=2.0V②→=2,
③=0
: 100mV increments,
±2%
accuracy
e.g. V
OUT
=3.8V,
±2%→②=3, ③=8, ④=2
: 100mV increments,
±1%
accuracy
e.g. V
OUT
=3.0V,
±1%→②=3, ③=0, ④=1
: 0.05V increments,
±2%
accuracy
e.g. V
OUT
=3.85V,
±2%→②=3, ③=8, ④=A
: 0.05V increments,
±1%
accuracy
e.g. V
OUT
=3.05V,
±1%→②=3, ③=0, ④=B
: SOT-25 (SOT-23-5)
: USP-6B
: SOT-89-5
: Embossed tape, standard feed
: Embossed tape, reverse feed
④
Output Voltage
Accuracy
⑤
⑥
NOTE :
Package
Device Orientation
*1: E to H types are compatible to 300mA of XC6204 series.
*2: Output voltage range of the
±1％
accuracy product is 3.0V to 6.0V.
3/49
XC6204/XC6205
Series
■BLOCK
DIAGRAM
Diodes shown in the above circuit are protective diodes.
■ABSOLUTE
MAXIMUM RATINGS
PARAMETER
Input Voltage
Output Current
Output Voltage
CE Input Voltage
SOT-25
Power Dissipation
USP-6B
SOT-89-5
Operational Temperature Range
Storage Temperature Range
SYMBOL
V
IN
I
OUT
V
OUT
V
CE
Pd
Topr
Tstg
RATINGS
12.0
500
V
SS
-0.3∼V
IN
+0.3
V
SS
-0.3∼V
IN
+0.3
250
100
500
-40 ~ +85
-55 ~ +125
Ta=25℃
UNITS
V
mA
V
V
mW
℃
℃
4/49
XC6204/XC6205
Series
■ELECTRICAL
CHARACTERISTICS
XC6204A, B series
PARAMETER
Output Voltage
(2% products) (*3)
Output Voltage
(1% products) (*3)
Maximum Output Current
Load Regulation
Dropout Voltage (*4)
Supply Current
(A series)
Supply Current
(B series)
Standby Current
Line Regulation
Input Voltage
Output Voltage
Temperature Characteristics
Output Noise
Ripple Rejection Rate
Current Limiter
Short-circuit Current
CE “High” Voltage
CE “Low” Voltage
CE “High” Current
(A series)
CE “High” Current
(B series)
CE “Low” Current
NOTE:
*1 : Unless otherwise stated, V
IN
=V
OUT(T)+
1.0V
*2 : V
OUT(T)=
Specified output voltage
*3 : V
OUT(E)=
Effective output voltage (i.e. the output voltage when “V
OUT (T)+
1.0V” is provided at the V
IN
pin while maintaining a
certain I
OUT
value).
*4 : Vdif={V
IN1
(*6)
SYMBOL
CONDITIONS
Ta = 25℃
MIN.
TYP. MAX.
×0.98
-40℃<Ta<85℃ (*7)
MIN.
TYP. MAX.
×1.03
V
OUT(T)
UNITS CIRCUIT
×1.02 ×0.97
V
OUT(T)
×1.01 ×0.98
-
15
-
50
E-1
E-2
150
-
-
30
VOUT(E)
I
OUT
= 30mA
×0.99
V
×1.02
-
80
mA
mV
mV
1
I
OUTMAX
V
OUT
Vdif1
Vdif2
-
1mA≦I
OUT
≦100mA
I
OUT
= 30mA
I
OUT
= 100mA
V
IN
= V
CE
= V
OUT(T)+
1.0V
150
-
1
1
1
50
40
-
-
2
-
80
70
0.01
0.01
-
100
30
120
100
0.10
0.20
10
-
-
-
-
-
V
IN
0.25
20.0
0.10
0.10
50
40
-
-
2
-
-
-
-
-
1.7
-
3.0
-0.15
-0.15
90
80
0.05
0.05
-
-
-
-
280
60
-
-
-
-
-
145
μA
2
120
1.00
0.30
10
-
-
-
-
-
V
IN
0.20
25.0
0.15
0.15
μA
2
μA
%/V
V
ppm/
℃
μVrms
dB
mA
mA
V
2
1
-
1
3
4
1
1
1
I
DD
V
IN
= V
CE
= V
OUT(T)+
1.0V
Istby
V
OUT
V
IN
½V
OUT
V
IN
V
OUT
Topr½V
OUT
en
PSRR
Ilim
Ishort
V
CEH
V
CEL
V
IN
= V
OUT(T
)+1.0V, V
CE
= V
SS
V
OUT(T)
+1.0V≦V
IN
≦10V
I
OUT
= 30mA
-
I
OUT
= 30mA
-40℃≦Topr≦85℃
I
OUT
= 10mA
300Hz~50kHz
V
IN
= {V
OUT(T)+
1.0}V+1.0Vp-pAC
I
OUT
= 50mA, f=10kHz
V
IN =
V
OUT(T)+
1.0V, V
CE
= V
IN
V
IN =
V
OUT(T)+
1.0V, V
CE
= V
IN
-
-
V
IN
= V
CE
= V
OUT(T)+
1.0V
I
CEH
V
IN
= V
CE
= V
OUT(T)+
1.0V
I
CEL
V
IN
= V
OUT(T)+
1.0V, V
CE
= V
SS
-0.10
-0.10
-
-
-
-
-
1.6
-
3.2
70
300
50
-
-
-
-V
OUT1
(*5)
}
*5 : V
OUT1
=A voltage equal to 98% of the output voltage whenever an amply stabilized I
OUT
{V
OUT(T)+
1.0V} is input.
*6 : V
IN1
=The input voltage when V
OUT1
appears as input voltage is gradually decreased.
*7 : The values for -40℃≦Topr≦85℃ are designed values.
5/49
FPGA/CPLD
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