NEC's 1.8 V L, S-BAND
UPG2006TB
SPDT SWITCH
FEATURES
• LOW INSERTION LOSS:
L
INS
= 0.3 dB TYP. @ V
cont
= 1.8 V/0 V, f = 1 GHz
L
INS
= 0.45 dB TYP. @ V
cont
= 1.8 V/0 V, f = 2.5 GHz
• HIGH ISOLATION:
I
SL
= 29 dB TYP. @ V
cont
= 1.8 V/0 V, f = 2 GHz
I
SL
= 25 dB TYP. @ V
cont
= 1.8 V/0 V, f = 2.5 GHz
• 6-PIN SUPER MINIMOLD PACKAGE:
(2.0
X
1.25
X
0.9MM)
DESCRIPTION
NEC's UPG2006TB is a L, S-band SPDT (Single Pole Double
Throw) switch for digital cellular or cordless telephone
applications.
The device can operate from 500 MHz to 2.5 GHz, with low
insertion loss and high isolation with 1.8 V control voltage.
APPLICATIONS
• L, S-band digital cellular or cordless telephones
• Bluetooth
TM
, W-LAN and WLL
• Short Range Wireless
ORDERING INFORMATION
Part Number
UPG2006TB-E3
Package
6-pin super minimold
Marking
G2J
Supplying Form
•
Embossed tape 8 mm wide
•
Pin 1, 2, 3 face the perforation side of the tape
•
Qty 3 kpcs/reel
Remark
To order evaluation samples, contact your nearby sales office.
Part number for sample order: UPG2006TB
Caution
Observe precautions when handling because these devices are sensitive to electrostatic discharge.
California Eastern Laboratories
UPG2006TB
PIN CONNECTIONS
(Top View)
3
2
1
4
5
6
4
5
6
(Bottom View)
Pin No.
Pin Name
OUT1
GND
OUT2
V
cont2
IN
V
DD1
3
2
1
1
2
3
4
5
6
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25°C, unless otherwise specified)
Parameter
Control Voltage 1, 2
Input Power (V
cont
= 1.8 V)
Total Power Dissipation
Operating Ambient Temperature
Storage Temperature
Symbol
V
cont1, 2
P
in
P
tot
T
A
T
stg
Ratings
−6.0
to +6.0
Note
+23
0.15
−45
to +85
−55
to +150
Unit
V
dBm
W
°C
°C
Note
|V
cont1-
V
cont2
|
≤
6.0 V
RECOMMENDED OPERATING RANGE
(T
A
= 25°C)
Parameter
Control Voltage (High)
Control Voltage (Low)
Symbol
V
cont(H)
V
cont(L)
MIN.
+1.6
−0.2
TYP.
+1.8
0
MAX.
+5.3
+0.2
Unit
V
V
G2J
UPG2006TB
ELECTRICAL CHARACTERISTICS
(T
A
= +25°C, V
cont1
= 1.8 V, V
cont2
= 0 V or V
cont1
= 0 V, V
cont2
= 1.8 V, Z
O
= 50
Ω,
Off chip DC blocking capacitors value; 51 pF,
unless otherwise specified)
Parameter
Insertion Loss
Symbol
L
INS
Test Conditions
f = 0.1 to 1.0 GHz
Note1
f = to 2.0 GHz
f = to 2.5 GHz
Isolation
ISL
f = 0.1 to 2.0 GHz
Note1
f = to 2.5 GHz
Input Return Loss
RL
in
f = 0.1 to 1.0 GHz
Note1
f = to 2.5 GHz
Output Return Loss
RL
out
f = 0.1 to 1.0 GHz
Note1
f = to 2.5 GHz
Input Power at 1 dB
Compression Point
Note2
Input Power at 0.1 dB
Compression Point
Note2
Switching Speed
Control Current
t
SW
I
cont
V
cont
= 1.8 V/0 V, RF Non
P
in(0.1 dB)
P
in(1 dB)
f = 2.0 GHz, V
cont
= 1.8 V/0 V
f = 2.0 GHz, V
cont
= 2.8 V/0 V
f = 2.0 GHz, V
cont
= 1.8 V/0 V
f = 2.0 GHz, V
cont
= 2.8 V/0 V
MIN.
−
−
−
25
20
13
16
13
16
17
22
−
−
−
−
TYP.
0.30
0.40
0.45
29
25
−
21
−
21
20
25
18
23
50
0.5
MAX.
0.55
0.60
0.65
−
−
−
−
−
−
−
−
−
−
200
10
Unit
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
dBm
dBm
ns
μA
Notes 1.
Off chip DC blocking capacitors at frequency range of 0.1 to 0.5 GHz 1,000 pF
2.
P
in(1 dB)
or P
in(0.1 dB)
is the input power level when the insertion loss increase 1 dB or 0.1 more than that of linear
range. All other characteristics are measured in linear range.
Cautions 1.
It is necessary to use DC blocking capacitors for No.1 (OUT1), No.3 (OUT2) and No.5 (IN). The value of DC blocking
capacitors should be chosen to accommodate the frequency of operation, bandwidth, switching speed and the
condition with the actual board of the system.
The range of recommended DC blocking capacitor value is less than 100 pF.
2. The distance between the GND pin and ground pattern of the substrate should be as short as possible to reduce
parasitic parameters.
UPG2006TB
EVALUATION CIRCUIT
(V
cont1
= 1.8 V, V
cont2
= 0 V or V
cont2
= 0 V, V
cont1
= 1.8 V, off chip DC blocking capacitors value C1 = 51 pF, C2 = 1 000 pF
(Bypass), using NEC standard evaluation board)
C2
V
cont1
6
1
C1
OUT1
G2J
IN
C1
V
cont2
C2
5
2
4
3
C1
OUT2
EVALUATION BOARD
V
cont1
OUT1
C2
IN
C1
C2
G2J
C1
C1
OUT2
6p SMM SPDT SW
V
cont2
TRUTH TABLE
V
cont1
Low
High
V
cont2
High
Low
IN−OUT1
ON
OFF
IN−OUT2
OFF
ON
UPG2006TB
TYPICAL CHARACTERISTICS
(V
cont1/2
= 0 V/1.8 V, P
in
= 0 dBm, OUT2 side is 50
Ω
termination)
INPUT RETURN LOSS vs. FREQUENCY
CH1 S
11
log MAG
10 dB/ REF 0 dB
1:-26.287
dB
1.0 GHz
2:
-30.675 dB
1.5 GHz
3:
-34.567 dB
2.0 GHz
4:
-27.974 dB
2.5 GHz
5:
-21.341 dB
3.0 GHz
CH1 S
21
ISOLATION vs. FREQUENCY
log MAG
10 dB/ REF 0 dB
1:
-27.744 dB
1.0 GHz
2:
-28.781 dB
1.5 GHz
3:
-29.32 dB
2.0 GHz
4:
-26.277 dB
2.5 GHz
5:
-22.797 dB
3.0 GHz
Input Return Loss RL
in
(dB)
Isolation ISL (dB)
0
0
-0
1
5
2
3
START 0.500 000 000 GHz
STOP 3.500 000 000 GHz
-20
1
2
3
4
5
-40
4
-40
START 0.500 000 000 GHz
STOP 3.500 000 000 GHz
Frequency f (GHz)
Frequency f (GHz)
INSERTION LOSS vs. FREQUENCY
CH1 S
21
log MAG
1 dB/ REF 0 dB
1:
-0.538 dB
1.0 GHz
2:
-0.646 dB
1.5 GHz
3:
-0.768 dB
2.0 GHz
4:
-0.899 dB
2.5 GHz
5:
-1.136 dB
3.0 GHz
OUTPUT RETURN LOSS vs. FREQUENCY
CH1 S
22
log MAG
10 dB/ REF 0 dB
1:
-25.904 dB
1.0 GHz
2:
-30.703 dB
1.5 GHz
3:
-31.201 dB
2.0 GHz
4:
-28.75 dB
2.5 GHz
5:
-20.829 dB
3.0 GHz
0
1
2
3
4
Output Return Loss RL
out
(dB)
Insertion Loss L
INS
(dB)
0
-2.0
5
ñ20
1
5
2
START 0.500 000 000 GHz
-4.0
START 0.500 000 000 GHz
STOP 3.500 000 000 GHz
ñ40
3
4
STOP 3.500 000 000 GHz
Frequency f (GHz)
Frequency f (GHz)
EVALUATION BOARD LOSS vs. FREQUENCY
CH1 S
21
log MAG
0.5 dB/ REF 0 dB
1:
-0.236 dB
1.0 GHz
2:
-0.321 dB
1.5 GHz
3:
-0.420 dB
2.0 GHz
4:
-0.511 dB
2.5 GHz
5:
-0.593 dB
3.0 GHz
Evaluation Board Loss (dB)
0
1
2
3
-1.0
4
5
-2.0
START 0.500 000 000 GHz
STOP 3.500 000 000 GHz
Frequency f (GHz)
Caution
These characteristics values include the losses of the NEC evaluation board.
Remark
The graphs indicate nominal characteristics.
FPGA/CPLD
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