INTEGRATED CIRCUITS
PTN2111
1:10 LVDS clock distribution device
Product Data
2001 Jun 19
Philips
Semiconductors
Philips Semiconductors
Product Data
1:10 LVDS clock distribution device
PTN2111
FEATURES
•
100 ps part-to-part skew
•
35 ps output-to-output skew
•
Differential design
•
Meets LVDS specification for driver outputs and receiver inputs
•
Reference voltage available output V
BB
•
Low voltage V
CC
range of +2.375 V to 2.625 V
•
High signalling rate capability (above 622 MHz)
•
Supports open, short, and terminated input fail-safe (HIGH output
state)
PIN CONFIGURATION
25 GND
24 Q3
23 Q3
22 Q4
21 Q4
20 Q5
19 Q5
18 Q6
17 Q6
Q9 10
Q8 12
Q8 13
Q7 14
Q7 15
GND 9
V
CC
16
Q9 11
32 V
CC
31 Q0
30 Q0
29 Q1
28 Q1
27 Q2
26 Q2
CK
SI
CLK0
CLK0
V
BB
CLK1
CLK1
EN
1
2
3
4
5
6
7
8
•
Programmable drivers power off control
•
Available in LQFP32 package
DESCRIPTION
The PTN2111 is a low skew programmable 1:10 LVDS clock
distribution device. The selected input signal is fanned out to 10
identical differential outputs.
The PTN2111 features an 11-bit Shift Register with a serial-in and a
Control Register. The purpose of the Control Register is to enable or
power off each output clock channel and to select the clock input.
The PTN2111 is specifically designed, modeled and produced with
low skew as the key goal. Optimal design and layout serve to
minimize gate-to-gate skew within a device. The final result is a
dependable guaranteed low skew device.
The PTN2111 can be used for high performance clock distribution in
+2.5 V systems with LVDS levels. Designers can take advantage of
the device’s performance to distribute low skew clocks across the
backplane or the board.
ST00013
PIN DESCRIPTION
PIN NUMBER
1
2
3
4
5
6
7
8
9, 25
16, 32
31, 29, 27, 24,
22, 20, 18, 15,
13, 11
30, 28, 26, 23,
21, 19, 17, 14,
12, 10
SYMBOL
CK
SI
CLK0
CLK0
V
BB
CLK1
CLK1
EN
GND
V
CC
Q[0:9]
NAME AND FUNCTION
Control register clock
Control register serial-in/CLK_SEL
Differential input
Differential input
Output reference voltage
Differential input
Differential input
Device enable/program
Ground
Supply voltage
Differential outputs
Q[0:9]
Differential outputs
TYPE NUMBER
PTN2111BD
NAME
LQFP32
DESCRIPTION
Plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm
VERSION
SOT358-1
2001 Jun 19
2
853-2263 26561
Philips Semiconductors
Product Data
1:10 LVDS clock distribution device
PTN2111
LOGIC DIAGRAM
SI
EN
Control Register 11-Bit
10
0
1
SEL
CLK0
CLK1
0
1
Q9
9 8 7 6 5 4 3 2 1 0
Counter
12
Shift Register 11-Bit
CK
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
ST00010
2001 Jun 19
3
Philips Semiconductors
Product Data
1:10 LVDS clock distribution device
PTN2111
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied.
SYMBOL
V
CC
I
OSD
ESD
T
j
Supply voltage
Driver short circuit current
Electrostatic discharge (Human Body Model 1.5 kΩ, 100 pF)
Junction temperature
PARAMETER
LIMITS
–0.3 to 2.8
continuous
>2
150
kV
°C
UNIT
V
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
IR
T
amb
Supply voltage
Receiver input voltage
Operating ambient temperature range in free air
PARAMETER
MIN
2.375
GND
–40
MAX
2.625
V
CC
+85
°C
UNIT
V
DC ELECTRICAL CHARACTERISTICS
T
amb
= –40
°C
to +85
°C
unless otherwise specified; V
CC
= 2.5 V
±5%
(Notes 1, 2)
SYMBOL
Driver
V
OD
∆V
OD
V
OS
∆V
OS
I
OS
OSD
Receiver
V
IDH
V
IDL
I
IN
Device
V
BB
I
CCD
C
IN
C
OUT
V
IH
V
IL
I
I
Output reference voltage
Power supply current
Input capacitance
Output capacitance
Logic input HIGH threshold
Logic input LOW threshold
Logic input current
V
CC
= 2.5 V
V
CC
= 2.5 V
V
CC
= 2.5 V;
V
IN
= V
CC
or GND
2
0.8
±10
V
CC
= 2.5 V;
I
OUT
≤
100
µA
All drivers enabled and loaded;
input frequency = 800 MHz
V
IN
= 0 V to V
CC
1.15
1.25
190
5
5
1.35
230
V
mA
pF
pF
V
V
µA
Input threshold HIGH
Input threshold LOW
Input current
V
IN
= 0 V
V
IN
= V
CC
–100
50
50
100
100
100
mV
mV
µA
µA
Output differential voltage
V
OD
magnitude change
Offset voltage
V
OS
magnitude change
Output short circuit current
R
L
= 100
Ω
R
L
= 100
Ω
R
L
= 100
Ω
R
L
= 100
Ω
V
O
= 0 V
V
OD
= 0 V
15
7
1.125
1.25
250
350
450
50
1.375
50
40
15
mV
mV
V
mV
mA
mA
PARAMETER
CONDITIONS
MIN
TYP
2
MAX
UNIT
NOTES:
1. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
2. All typical values are given for V
CC
= +2.5 V and T
amb
= +25
°C,
unless otherwise specified.
3. C
L
includes probe and fixture capacitance.
4. Generator waveforms for all tests unless otherwise specified: f = 1 MHz, Z
O
= 50
Ω,
50% duty cycle.
5. The PTN2111 is a current mode device, and only functions to datasheet specifications when a resistive load is applied to the drives outputs.
2001 Jun 19
4
Philips Semiconductors
Product Data
1:10 LVDS clock distribution device
PTN2111
AC ELECTRICAL CHARACTERISTICS (LVDS)
T
amb
= –40
°C
to +85
°C
unless otherwise specified; V
CC
= 2.5 V
±5%
(Note 1)
SYMBOL
t
TLH
t
THL
t
PLH
t
PHL
f
MAX
t
skew
PARAMETER
Transition time LOW to HIGH
Transition time HIGH to LOW
Propagation delay to output
Maximum input frequency
Within-device skew
Part-to-part skew
Pulse skew
NOTE:
1. Generator waveforms for all tests unless otherwise specified: f = 1 MHz, Z
O
= 50
Ω,
50% duty cycle.
650
800
35
100
50
CONDITIONS
R
L
= 100
Ω;
C
L
= 5 pF
R
L
= 100
Ω;
C
L
= 5 pF
MIN
TYP
460
460
MAX
560
560
2
UNIT
ps
ps
ns
MHz
ps
ps
ps
2001 Jun 19
5
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