SM802149
156.25MHz/312.5MHz and
78.125MHz/156.25MHz
LVDS Clock Synthesizer
ClockWorks™ Flex
General Description
The SM802149 is a member of the ClockWorks family of
devices from Micrel and provides an extremely low-noise
timing solution. It is based on a unique patented
ClockWorks Flex architecture that provides very low phase
noise.
The device operates from a 3.3V or 2.5V power supply
and synthesizes eight differential LVDS clocks, four at
156.25MHz and four at 3125MHz, or four at 78.125MHz
and four at 156.25MHz.
The SM802149 accepts a 26.04166MHz crystal or external
LVCMOS input.
Datasheets and support documentation are available on
Micrel’s web site at:
www.micrel.com.
Features
•
Generates eight differential LVDS clocks: either four at
156.25MHz and four at 312.5MHz, or four at 78.125MHz
and four at 156.25MHz
•
2.5V or 3.3V operating range
•
Typical phase jitter (1.875MHz to 20MHz): 99fs
•
Industrial temperature range
•
Green, RoHS, and PFOS compliant
•
Available in 44-pin 7mm
×
7mm QFN package
Typical Application
ClockWorks is a trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
March 1, 2013
Revision 1.1
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802149
Ordering Information
(1)
Part Number
SM802149UMG
SM802149UMGR
Note:
1. Devices are Green, RoHS, and PFOS compliant.
Marking
802149
802149
Shipping
Tray
Tape and Reel
Temperature Range
–40°C to +85°C
–40°C to +85°C
Package
44-Pin QFN
44-Pin QFN
Pin Configuration
44-Pin QFN
7mmx7mm
(Top View)
March 1, 2013
2
Revision 1.1
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802149
Pin Description
Pin Number
25, 26
28, 29
32, 33
35, 36
41, 42
1, 2
4, 5
7, 8
31, 37, 38
43, 44, 16
24, 39
3, 6, 40
23
Pin Name
/Q1, Q1
/Q2, Q2
/Q3, Q3
/Q4, Q4
/Q5, Q5
/Q6, Q6
/Q7, Q7
/Q8, Q8
VDDO1
VDDO2
VSSO1
VSSO2
GND
Pin Type
Pin Level
Pin Function
Differential Clock Outputs from Bank 1
312.50MHz/156.25MHz
O, (DIF)
LVDS
O, (DIF)
LVDS
Differential Clock Outputs from Bank 2
156.25MHz/78.125MHz
Power Supply for the Outputs on Bank 1
Power Supply for the Outputs on Bank 2
Power Supply Ground for the Outputs on Bank 1
Power Supply Ground for the Outputs on Bank 2
This pin is not a Power Supply Ground, but MUST be tied to VSS
Selects PLL Input Reference Source
0 = REF_IN
1 = XTAL
45kΩ pull-up
Factory Test Pins. Do not connect anything to these pins.
Core Power Supply
Core Power Supply Ground. The exposed pad must be connected
to the VSS ground plane.
PLL Bypass is a dual-function input. Normal operation selects
output source.
0 = Normal PLL operation
1 = Output from crystal oscillator
45kΩ pull-down
Crystal Reference Input. No load caps needed.
See
Figure 5.
Crystal Reference Output. No load caps needed.
See
Figure 5.
26.04166MHz Reference Clock Input
Frequency Select.
1 = 312.5MHz/156.25 MHz
0 = 156.25MHz/78.125MHz.
Internal 45kΩ pull-up
Output Enable. Q1−Q4 disables to tri-state.
0 = Disabled
1 = Enabled
45kΩ pull-up
Output Enable. Q5−Q8 disables to tri-state.
0 = Disabled
1 = Enabled
45kΩ pull-up
PWR
PWR
PWR
PWR
I, (SE)
10
XTAL_SEL
I, (SE)
LVCMOS
11, 20, 27, 30, 34
12, 13
21
TEST
VDD
VSS
(Exposed Pad)
PWR
PWR
9
PLL_BYPASS
I, (SE)
LVCMOS
18
19
17
XTAL_IN
XTAL_OUT
REF_IN
I, (SE)
O, (SE)
I, (SE)
10pF crystal
10pF crystal
LVCMOS
14
FSEL
I, (SE)
LVCMOS
15
OE1
I, (SE)
LVCMOS
22
OE2
I, (SE)
LVCMOS
March 1, 2013
3
Revision 1.1
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802149
Truth Tables
PLL_BYPASS
0
1
0
1
XTAL_SEL
OE1
1
1
1
1
0
1
OE2
1
1
1
1
1
0
REF_IN
XTAL
Q1−4 Tri-State
Q5−8 Tri-State
INPUT
OUTPUT
PLL
XTAL/REF_IN
FSEL
0
1
Output Frequency (MHz)
156.25/78.125
312.50/156.25
March 1, 2013
4
Revision 1.1
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802149
Absolute Maximum Ratings
(2)
Supply Voltage (V
DD
, V
DDOX
)........................................ +4.6V
Input Voltage (V
IN
) ..................................
−0.5V
to V
DD
+0.5V
Lead Temperature (soldering, 20s) ............................ 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (Ts).........................
−65°C
to +150°C
Operating Ratings
(3)
Supply Voltage (V
DD,
V
DDOX
) ................. +2.375V to +3.465V
Ambient Temperature (T
A
) .......................... –40°C to +85°C
(4)
Junction Thermal Resistance
QFN (θ
JA
)
Still-Air ......................................................... 24°C/W
QFN (ψ
JB
)
Junction to Board .......................................... 8°C/W
DC Electrical Characteristics
(5)
V
DD
= V
DDO1/2
= 3.3V ±5% or 2.5V ±5%, V
DD
= 3.3V ±5%, V
DDO1/2
= 3.3V ±5% or 2.5V ±5%, T
A
=
−40°C
to +85°C.
Symbol
Parameter
3.3V Operating Voltage
2.5V Operating Voltage
V
DD,
V
DDO1/2
Condition
V
DDO1
= V
DDO2
V
DDO1
= V
DDO2
Outputs loaded 156.25MHz
Outputs loaded 312.5MHz
Min.
3.135
2.375
Typ.
3.3
2.5
181
216
Max.
3.465
2.625
235
280
mA
Units
V
V
LVCMOS Input (OE1, OE2, PLL_BYPASS) DC Electrical Characteristics
(5)
V
DD
= 3.3V ±5%, or 2.5V ±5%, T
A
=
−40°C
to +85°C.
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
V
DD
= V
IN
= 3.465V
V
DD
= 3.465V, V
IN
= 0V
−150
Condition
Min.
2
−0.3
Typ.
Max.
V
DD
+ 0.3
0.8
150
Units
V
V
µA
µA
REF_IN DC Electrical Characteristics
(5)
V
DD
= 3.3V ±5%, or 2.5V ±5%, T
A
=
−40°C
to +85°C.
Symbol
V
IH
V
IL
I
IN
Notes:
2. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this datasheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
3. The datasheet limits are not guaranteed if the device is operated beyond the operating ratings.
4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB.
5. The circuit is designed to meet the AC and DC specifications shown in the above tables after thermal equilibrium has been established.
Parameter
Input High Voltage
Input Low Voltage
Input Current
Condition
Min.
1.1
−0.3
Typ.
Max.
V
DD
+ 0.3
0.6
5
Units
V
V
µA
V
IN
= 0V to V
DD
−5
March 1, 2013
5
Revision 1.1
hbwhelp@micrel.com
or (408) 955-1690
FPGA/CPLD
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