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PI6ULS5V9509UE

产品描述Level Translating SMBus Repeater with Tiny Package
文件大小580KB,共10页
制造商Pericom Semiconductor Corporation (Diodes Incorporated)
官网地址https://www.diodes.com/
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PI6ULS5V9509UE概述

Level Translating SMBus Repeater with Tiny Package

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PI6ULS5V9509
Level Translating I
2
C-Bus/SMBus Repeater with Tiny Package
Features
Bidirectional buffer isolates capacitance and allows
400 pF on port B of the device
Port A operating supply voltage range of 1.1 V to
V
CC(B)
- 1.0V
Port B operating supply voltage range of 2.5 V to
5.5 V
Voltage level translation from 1.1V to V
CC(B)
-
1.0V and from 2.5 V to 5.5 V
Requires no external pull-up resistors on lower
voltage port A
Open-drain port B inputs/outputs
Lock-up free operation
Supports arbitration and clock stretching across the
repeater
Accommodates Standard-mode and Fast-mode I
2
C-
bus devices and multiple masters
Powered-off high-impedance I
2
C-bus pins
5 V tolerant B SCL, SDA and enable pins
0 Hz to 400 kHz clock frequency (Remark: The
maximum system operating frequency may be less
than 400 kHz because of the delays added by the
repeater.)
ESD protection exceeds 8KV HBM per JESD22-
A114
Package: MSOP-8, SOIC-8 and
UQFN1.6x1.6-8L
Description
T
he PI6ULS5V9509 is a level translating I C-
2
Pin Configuration
SOIC-8 and MSOP-8
bus/SMBus repeater.
It can provide bidirectional level
translation between low voltage (down to 1.1V) and
higher voltage (2.5V to 5.5V) in mixed-mode
applications. And it enables I
2
C and similar bus system
to be extended, without degradation of performance
even during level shifting.
The PI6ULS5V9509 enables the system designer to
isolate two halves of a bus for both voltage and
capacitance, accommodating more I
2
C devices or longer
trace length. It also permits extension of the I
2
C-bus by
providing bidirectional
buffering
for both the data (SDA)
and the clock (SCL) lines, thus allowing two buses of
400 pF to be connected in an I
2
C application.
The bus port B drivers are compliant with SMBus
I/O levels, while port A uses a current sensing
mechanism to detect the input or output LOW signal
which prevents bus lock-up. Port A uses a 1 mA current
source for pull-up and a 200Ω pull-down driver. This
result in a LOW on the port A accommodating smaller
voltage swings. The output pull-down on the port A
internal buffer LOW is set for approximately 0.2V,
while the input threshold of the internal buffer is set
about 50 mV lower than that of the output voltage LOW.
When the port A I/O is driven LOW internally, the LOW
is not recognized as a LOW by the input. This prevents a
lock-up condition from occurring. The output pull-down
on the port B drives a hard LOW and the input level is
set at 0.3 of SMBus or I
2
C-bus voltage level which
enables port B to connect to any other I
2
C-bus devices or
buffer.
The PI6ULS5V9509 drivers are not enabled unless
V
CC(A)
is above 0.8 V and V
CC(B)
is above 2.5 V. The
enable (EN) pin can also be used to turn the drivers on
and off under system control. Caution should be
observed to only change the state of the EN pin when the
bus is idle.
Pin Description
Pin No
1
2
3
4
5
6
7
8
Pin Name
V
CC(A)
A1
A2
GND
EN
B2
B1
V
CC(B)
Description
port A supply voltage
port A (lower voltage side)
port A (lower voltage side)
supply ground (0 V)
active HIGH repeater enable input
port B (SMBus/I
2
C-bus side)
port B (SMBus/I
2
C-bus side)
port B supply voltage
UQFN1.6x1.6-8L(Top View)
2015-04-0005
1
PT0460-3
04/20/15

 
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