PDTD113E series
NPN 500 mA, 50 V resistor-equipped transistors;
R1 = 1 kΩ, R2 = 1 kΩ
Rev. 02 — 16 November 2009
Product data sheet
1. Product profile
1.1 General description
500 mA NPN Resistor-Equipped Transistors (RET) family.
Table 1.
Product overview
Package
NXP
PDTD113EK
PDTD113ES
[1]
PDTD113ET
[1]
Type number
PNP complement
JEITA
SC-59A
SC-43A
-
JEDEC
TO-236
TO-92
TO-236AB
PDTB113EK
PDTB113ES
PDTB113ET
SOT346
SOT54
SOT23
Also available in SOT54A and SOT54 variant packages (see
Section 2).
1.2 Features
Built-in bias resistors
Simplifies circuit design
500 mA output current capability
Reduces component count
Reduces pick and place costs
±10
% resistor ratio tolerance
1.3 Applications
Digital application in automotive and
industrial segments
Controlling IC inputs
Cost saving alternative for BC817 series
in digital applications
Switching loads
1.4 Quick reference data
Table 2.
Symbol
V
CEO
I
O
R1
R2/R1
Quick reference data
Parameter
collector-emitter voltage
output current (DC)
bias resistor 1 (input)
bias resistor ratio
Conditions
open base
Min
-
-
0.7
0.9
Typ
-
-
1
1.0
Max
50
500
1.3
1.1
Unit
V
mA
kΩ
NXP Semiconductors
PDTD113E series
NPN 500 mA resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ
2. Pinning information
Table 3.
Pin
SOT54
1
2
3
input (base)
output (collector)
GND (emitter)
R1
Pinning
Description
Simplified outline
Symbol
2
1
2
3
001aab347
006aaa145
1
R2
3
SOT54A
1
2
3
input (base)
output (collector)
GND (emitter)
R1
2
1
2
3
001aab348
006aaa145
1
R2
3
SOT54 variant
1
2
3
input (base)
output (collector)
GND (emitter)
R1
2
1
2
3
001aab447
006aaa145
1
R2
3
SOT23, SOT346
1
2
3
input (base)
GND (emitter)
output (collector)
1
2
006aaa144
sym007
3
R1
3
1
R2
2
PDTD113E_SER_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 16 November 2009
2 of 10
NXP Semiconductors
PDTD113E series
NPN 500 mA resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ
3. Ordering information
Table 4.
Ordering information
Package
Name
PDTD113EK
PDTD113ES
[1]
PDTD113ET
[1]
Type number
Description
plastic surface mounted package; 3 leads
Version
SOT346
SC-59A
SC-43A
-
plastic single-ended leaded (through hole) package; SOT54
3 leads
plastic surface mounted package; 3 leads
SOT23
Also available in SOT54A and SOT54 variant packages (see
Section 2
and
Section 9).
4. Marking
Table 5.
Marking codes
Marking code
[1]
E1
D113ES
*7R
Type number
PDTD113EK
PDTD113ES
PDTD113ET
[1]
* = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
5. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
V
I
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
positive
negative
I
O
P
tot
output current (DC)
total power dissipation
SOT346
SOT54
SOT23
T
stg
T
j
T
amb
[1]
Conditions
open emitter
open base
open collector
Min
-
-
-
-
-
-
Max
50
50
10
+10
−10
500
250
500
250
+150
150
+150
Unit
V
V
V
V
V
mA
mW
mW
mW
°C
°C
°C
T
amb
≤
25
°C
[1]
-
-
-
−65
-
−65
storage temperature
junction temperature
ambient temperature
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
© NXP B.V. 2009. All rights reserved.
PDTD113E_SER_2
Product data sheet
Rev. 02 — 16 November 2009
3 of 10
NXP Semiconductors
PDTD113E series
NPN 500 mA resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ
6. Thermal characteristics
Table 7.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from
junction to ambient
SOT346
SOT54
SOT23
[1]
Conditions
in free air
[1]
Min
Typ
Max
Unit
-
-
-
-
-
-
500
250
500
K/W
K/W
K/W
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
7. Characteristics
Table 8.
Characteristics
T
amb
= 25
°
C unless otherwise specified.
Symbol
I
CBO
I
CEO
I
EBO
h
FE
V
CEsat
V
I(off)
V
I(on)
R1
R2/R1
C
c
Parameter
Conditions
Min
-
-
-
-
33
-
0.6
1.0
0.7
0.9
-
Typ
-
-
-
-
-
-
1.1
1.4
1
1
7
Max
100
100
0.5
4
-
0.3
1.5
1.8
1.3
1.1
-
pF
V
V
V
kΩ
Unit
nA
nA
μA
mA
collector-base cut-off V
CB
= 40 V; I
E
= 0 A
current
V
CB
= 50 V; I
E
= 0 A
collector-emitter
cut-off current
emitter-base cut-off
current
DC current gain
collector-emitter
saturation voltage
V
CE
= 50 V; I
B
= 0 A
V
EB
= 5 V; I
C
= 0 A
V
CE
= 5 V; I
C
= 50 mA
I
C
= 50 mA; I
B
= 2.5 mA
off-state input voltage V
CE
= 5 V; I
C
= 100
μA
on-state input voltage V
CE
= 0.3 V; I
C
= 20 mA
bias resistor 1 (input)
bias resistor ratio
collector capacitance V
CB
= 10 V; I
E
= i
e
= 0 A;
f = 100 MHz
PDTD113E_SER_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 16 November 2009
4 of 10
NXP Semiconductors
PDTD113E series
NPN 500 mA resistor-equipped transistors; R1 = 1 kΩ, R2 = 1 kΩ
10
3
h
FE
10
2
006aaa310
10
−1
(1)
006aaa311
(1)
(2)
(3)
V
CEsat
(V)
(2)
(3)
10
1
10
−1
10
−1
1
10
10
2
I
C
(mA)
10
3
10
−2
10
10
2
I
C
(mA)
10
3
V
CE
= 5 V
(1) T
amb
= 100
°C
(2) T
amb
= 25
°C
(3) T
amb
=
−40 °C
I
C
/I
B
= 20
(1) T
amb
= 100
°C
(2) T
amb
= 25
°C
(3) T
amb
=
−40 °C
Fig 1.
DC current gain as a function of collector
current; typical values
10
006aaa312
Fig 2.
Collector-emitter saturation voltage as a
function of collector current; typical values
10
006aaa313
V
I(on)
(V)
(1)
V
I(off)
(V)
(1)
1
(2)
(3)
1
(2)
(3)
10
−1
10
−1
1
10
10
2
I
C
(mA)
10
3
10
−1
10
−1
1
I
C
(mA)
10
V
CE
= 0.3 V
(1) T
amb
=
−40 °C
(2) T
amb
= 25
°C
(3) T
amb
= 100
°C
V
CE
= 5 V
(1) T
amb
=
−40 °C
(2) T
amb
= 25
°C
(3) T
amb
= 100
°C
Fig 3.
On-state input voltage as a function of
collector current; typical values
Fig 4.
Off-state input voltage as a function of
collector current; typical values
PDTD113E_SER_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 16 November 2009
5 of 10
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