CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Short circuit may be applied to ground or to either supply.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
Input Resistance
Input Capacitance
Output Resistance
Equivalent Input
Noise Voltage
Short-Circuit Current
Source
To Opposite Supply
Sink
Gain Bandwidth Product
Slew Rate
Transient Response
Rise Time
Overshoot
Typical Values Intended Only for Design Guidance, V
SUPPLY
=
±5V,
R
SET
= 10MΩ, T
A
= 25
o
C
SYMBOL
R
I
C
I
R
O
e
N
f = 1kHz
f = 10kHz
I
OM
+
I
OM
-
f
T
SR
R
L
= 10kΩ, C
L
= 100pF
t
R
OS
5.6
10
µs
%
R
S
= 100Ω
TEST CONDITIONS
CA3440
2
3.5
450
110
110
15
4.5
63
0.03
UNITS
TΩ
pF
Ω
nV/√Hz
nV/√Hz
mA
mA
kHz
V/µs
Electrical Specifications
PARAMETER
Input Offset Voltage
Input Offset Current
Input Current
Large Signal Voltage Gain
For Equipment Design, At V
SUPPLY
=
±5V;
R
SET
= 10MΩ, T
A
= 25
o
C, Unless Otherwise Specified
TEST
CONDITIONS
CA3440
MIN
-
-
-
R
L
= 10kΩ
10
80
TYP
5
2.5
10
100
100
100
80
+3.7
-5.3
32
90
+3.2
-3.2
10
100
4
MAX
10
30
50
-
-
320
-
-
-
320
-
-
-
17
170
-
UNITS
mV
pA
pA
kV/V
dB
µV/V
dB
V
V
µV/V
dB
V
V
µA
µW
µV/
o
C
SYMBOL
|V
IO
|
| I
IO
|
| I
I
|
A
OL
CMRR
Common Mode Rejection Ratio
-
70
Common Mode Input Voltage Range
V
lCR
+
V
lCR
-
PSRR
+3.5
-5.0
-
70
Power Supply Rejection Ratio
Max Output Voltage
V
OM
+
V
OM
-
I+
P
D
∆V
lO
/∆T
+3
-3
-
-
-
Supply Current
Device Dissipation
Input Offset Voltage Temperature Drift
3-147
CA3440
Schematic Diagram
7 V+
Q
P1
Q
P2
Q
P3
I
SET
8
Q
P4
D
5
Q
P5
Q
P6
Q
1
Q
N10
Q
N9
Q
2
R
1
200Ω
R
2
30Ω
6 OUTPUT
Q
P12
Q
P11
D
1
INVERTING
2
INPUT
NON-INVERTING 3
Q
5
Q
3
5
1
Q
4
Q
6
D
2
D
3
D
4
Q
P7
Q
P8
30pF
Q
7
D
6
R
3
30Ω
4 V-
Application Information
-
FET
INPUT
+
2
BIAS
3
I
SET
R
SET
1
STAGE 1
HIGH GAIN
100dB
STAGE 2
BUFFER
LOW Z
OUTPUT
FET/
BIPOLAR
OUTPUT
+5V
7
-
CA3440
+
5
4
8
I
SET
R
SET
6
FIGURE 1. NANOPOWER OP AMP (SUPPLY CURRENT PRO-
GRAMMABLE USING R
SET
), 1pA TYPICAL INPUT
BIAS CURRENT, 4.0V TO 15V SUPPLY
FIGURE 2. NANOPOWER OP AMP (USABLE STANDBY
POWER vs PROGRAMMING RESISTOR R
SET
)
As R
SET
is increased, I
SET
and the standby power decrease
while the BW/SR also decrease.
Operating at a +5V single supply, the CA3440 exhibits the
following characteristics:
R
SET
1MΩ
10MΩ
100MΩ
1GΩ
STANDBY
POWER
250µW
25µW
2.5µW
250nW
BW
164kHz
27kHz
2.6kHz
78kHz
SR
0.17V/µs
0.017V/µs
0.0017V/µs
0.00017V/µs
The CA3440 is pin compatible with the 741 except that pins
1 and 5 (typical negative nulling pins) must be connected
either directly to pin 4 or to a negative nulling potentiometer.
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