PULSEGUARD
®
SUPPRESSOR
SURFACE MOUNT ESD SUPPRESSORS
8-Line CA10
PRODUCT OVERVIEW
PulseGuard ESD Suppressors help protect sensitive elec-
tronic equipment against electrostatic discharge (ESD).
They supplement the on-chip protection of integrated cir-
cuitry and are best suited for low-voltage, high-speed
applications where low capacitance is important.
Applications such as computer I/O ports (eg. video dis-
plays), network hardware, cell phone data ports, point-of-
sale terminals, and industrial controls will benefit
from this new technology. PulseGuard suppressors use
polymer composite materials to suppress fast-rising ESD
transients (as specified in IEC 61000-4-2 and MIL-STD-
883E).
FEATURES
• Ultra-low capacitance
• Low leakage current
• Fast response time
• Bi-directional
• Withstands multiple ESD strikes
• Packaged in chip array (capacitor/resistor) format
• Compatible with pick-and-place processes
• Available on 2,000 piece reels (EIA-RS481)
PHYSICAL SPECIFICATIONS
Materials:
Body: Glass Epoxy
Terminations: Tin-Lead
Soldering Parameters:
Wave solder -- 260
o
C, 10 seconds maximum
Reflow solder -- 260
o
C, 30 seconds maximum
Operating Temperature Range:
-65
o
C to +125
o
C
TYPICAL APPLICATIONS
• Computer I/O ports (e.g. video displays)
• Computer peripherals
• Network hardware/ports (e.g. Gigabit Ethernet)
• Point-of-Sale terminals
• Cell phone data ports
• Audio/video components
• Test Equipment
• Medical Equipment
ORDERING INFORMATION
Catalog Number
Pieces per Reel
PGB008CA10PR
2,000
ELECTRICAL CHARACTERISTICS
Trigger Voltage
1
Clamping Voltage
1
Rated Voltage
Capacitance
2
Response Time
1
Leakage Current
3
ESD Pulse Withstand
1
1,000V, typical
150V, typical
24VDC, max
0.055pF
<1ns
<1nA
1,000 pulses, minimum
DESIGN CONSIDERATION
Because of the fast rise-time of the ESD transient, place-
ment of PulseGuard suppressors is a key design consider-
ation. To achieve optimal ESD suppression, the devices
should be placed on the circuit board as close to the
source of the ESD transient as possible. Install
PulseGuard suppressors directly behind the connector so
that they are the first board-level circuit component
encountered by the ESD transient. They are connected
from signal/data line to ground.
Notes:
1. 8 kV direct discharge method, per IEC 61000-4-2.
2. Measured at 1 MHz.
3. Measured at 6 VDC. Testing at fast ESD pulse rates (1-20Hz) may
cause a change in leakage current performance (6µA, max).
1
PULSEGUARD
®
SUPPRESSOR
SURFACE MOUNT ESD SUPPRESSORS
8-Line CA10
Generalized PulseGuard Response to ESD
(Positive and Negative Polarity ESD Pulses)
Trigger Voltage
Generalized I-V Curve
(Positive and Negative Polarity ESD Pulses)
Trigger
Voltage
Current (A)
Voltage (V)
Clamping Voltage
Clamping
Voltage
Voltage (V)
Time (ns)
DEFINITIONS
Trigger Voltage:
The measured peak voltage across the ESD
suppressor before it transitions from high to low resistance.
It is manifested as a “spike” before the clamping voltage is
achieved. This voltage is typically well below the damage
threshold of on-chip IC protection.
Clamping Voltage:
The voltage level to which the ESD
impulse voltage is reduced. This is the voltage that the sup-
pressor holds at, until the ESD transient energy is dissipat-
ed.
ESD Impulse Voltage:
Also known as the ESD Threat Voltage.
This is the voltage that is “zapped” into the circuit. Voltages
generated by people can exceed 15 kV. The IEC 61000-4-2
defines four levels of impulse voltage for testing
purposes:
SEVERITY LEVEL
1
2
3
4
AIR DISCHARGE
2 kV
4 kV
8 kV
15 kV
DIRECT DISCHARGE
2 kV
4 kV
6 kV
8 kV
Capacitance vs. Frequency
70
** Note: 1,000 fF = 1 pF
Capacitance (fF)
60
50
40
0.5
1.0
1.5
2.0
Frequency (GHz)
Carrier Tape Specifications
Parts are delivered on 7” (178mm) reel, plastic carrier tape
T
t
D
d
+
+
D
s
+
+
T
w
P
d
+
+
+
P
h
P
w
C
t
P
s
Description
C
t
- Cover tape thickness
D
d
- Drive hole diameter
D
s
- Drive hole spacing
P
d
- Pocket depth
P
h
- Pocket height
P
s
- Pocket spacing
P
w
- Pocket width
T
t
- Carrier tape thickness
T
w
- Carrier tape width
Measurement (mm)
0.06
1.50
4.00
1.02
5.38
4.00
2.44
0.30
12.00
2
PULSEGUARD
®
SUPPRESSOR
SURFACE MOUNT ESD SUPPRESSORS
8-Line CA10
Test Set-up for IEC 61000-4-2 Waveform, 2kV-15kV
Device under test
Tek P6156 Probe (Voltage measurement)
KeyTek pulser
2,000- 15,000 V
Brown tip (x100)
x10
Faraday cage
Ground return
x10
Tektronic TDS 684B
Blue tip (x10)
.5 ohm shunt (10-5 ohms in parallel)
Tek P6156 Probe (Current measurement)
Reference Schematics:
Recommended Pad Layout:
Device Dimensions:
0.083"
0.007
Equivalent Circuit:
d
+
+
e
0.043"
10
1
2
0.198"
0.008
9
8
7
6
5
+
f
g
3
4
a
b
+
c
b
a
*Dimension 'a' is: 0.026"
*Dimension 'b' is: 0.015"
Solder Method
Wave Solder
Reflow Solder
a
0.036
0.025
b
0.060
0.050
Pad Dimensions (in.)
c
d
e
0.119
0.101
0.047
0.051
0.043
0.043
f
0.030
0.030
g
0.198
0.191
Note:
Pins 5 and 10 (Common) are typ-
ically connected to chassis ground.
However since PulseGuard suppres-
sors are bi-directional, the system volt-
age bus can also be used as the ESD
“dump”.
3
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