SPC11A
SP
12KB Sound Controller
Preliminary
JUL. 09, 2001
Version 0.1
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Preliminary
SPC11A
Table of Contents
PAGE
1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3
2. BLOCK DIAGRAM ...................................................................................................................................................................................... 3
3. FEATURES.................................................................................................................................................................................................. 3
4. APPLICATION FIELD ................................................................................................................................................................................. 3
5. SIGNAL DESCRIPTIONS* .......................................................................................................................................................................... 4
6. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 5
6.1. CPU ..................................................................................................................................................................................................... 5
6.2. ROM A
REA
........................................................................................................................................................................................... 5
6.3. RAM A
REA
............................................................................................................................................................................................ 5
6.4. M
AP OF
M
EMORY AND
I/O
S
.................................................................................................................................................................... 5
6.5. I/O P
ORT
C
ONFIGURATION
*.................................................................................................................................................................... 5
6.6. P
OWER
S
AVING
M
ODE
........................................................................................................................................................................... 5
6.7. L
OW
V
OLTAGE
R
ESET
............................................................................................................................................................................ 6
6.8. T
IMER
/C
OUNTER
................................................................................................................................................................................... 6
6.9. S
PEECH AND
M
ELODY
............................................................................................................................................................................ 7
7. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 8
7.1. A
BSOLUTE
M
AXIMUM
R
ATINGS
............................................................................................................................................................... 8
7.2. AC C
HARACTERISTICS
(T
A
= 25℃) ........................................................................................................................................................ 8
7.3. DC C
HARACTERISTICS
(VDD = 3.0V, T
A
= 25°C) ................................................................................................................................... 8
7.4. DC C
HARACTERISTICS
(VDD = 5.0V, T
A
= 25°C) ................................................................................................................................... 8
8. APPLICATION CIRCUITS........................................................................................................................................................................... 9
8.1. A
PPLICATION
C
IRCUIT
............................................................................................................................................................................ 9
8.2. C
URRENT
M
ODE
DAC S
PEAKER
D
RIVER
.............................................................................................................................................. 10
9. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 11
9.1. PAD A
SSIGNMENT
................................................................................................................................................................................11
9.2. O
RDERING
I
NFORMATION
......................................................................................................................................................................11
9.3. PAD L
OCATIONS
.................................................................................................................................................................................. 12
10. DISCLAIMER............................................................................................................................................................................................. 13
11. REVISION HISTORY ................................................................................................................................................................................. 14
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Proprietary & Confidential
2
JUL. 09, 2001
Preliminary Version: 0.1
Preliminary
SPC11A
12KB SOUND CONTROLLER
1. GENERAL DESCRIPTION
The SPC11A, a two-channel speech/melody synthesizer, equips
an 8-bit CMOS microprocessor with 69 instructions, 12K-byte
ROM for speech and melody data (speech compressed by a 4-bit
ADPCM with approx. three seconds speech duration @ 6.0KHz
sampling rate) and 64-byte working SRAM.
and one 8-bit current D/A output.
Other primary
features include two Timer/Counters, 8 Software Selectable I/Os,
In audio processing, melody
It operates at a wide
!
Supports ROSC only
!
Max. CPU clock: 4.0MHz @ 3.0V, 6.0MHz @ 5.0V
!
Standby mode (Clock Stop mode) for power savings.
Max. 2µA @ 5.0V
!
500ns instruction cycle time @ 4.0MHz CPU clock
!
Eight general I/Os
!
Two 12-bit timer/counters
!
Six INT sources
!
Key wake -up function
!
Approx. 3-sec speech @ 6.0KHz sampling rate with ADPCM
!
One D/A output
!
Low Voltage Reset
and speech can be mixed into one output.
3. FEATURES
!
8-bit microprocessor
!
12K-byte ROM for program and audio data
!
64-byte working SRAM
!
Software-based audio processing
!
Wide operating voltage: 2.4V - 5.5V @ 4.0MHz
3.6V - 5.5V @ 6.0MHz
voltage range of 2.4V - 5.5V with a Low Voltage Reset function
that automatically resets CPU when operating voltage is less than
1.3V/2.7V.
Plus, a Clock Stop mode is built in for power savings.
The
The unique power saving mode saves the RAM contents, but
freezes the oscillator to stop executing other functions.
maximum CPU frequency can run up to 6.0MHz and the
instruction cycle is two clock cycles (min.) ~ six clock cycles
(max.).
The SPC11A loads, not only the latest technology, but
also the full commitment and technical support of Sunplus.
2. BLOCK DIAGRAM
4. APPLICATION FIELD
Two Timers
TimeBase
INT control
8-bit
microprocessor
12K-byte
ROM
!
Intelligent education toys
Ex. Pattern to voice (animal, car, color, etc.)
Spelling (English or Chinese)
64-byte
SRAM
Two
8-bit D/A
(current)
ROSC
CLK
OSC
Low
Voltage
Reset
AUD
Math
!
Advanced toy controller
!
General speech synthesizer
!
Industrial controller
8
PINS
GENERAL
I/O
PORT
IOD7-6,IOD1-0
(I/O)
IOC7-6,IOC2-1
(I/O)
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Proprietary & Confidential
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JUL. 09, 2001
Preliminary Version: 0.1
Preliminary
SPC11A
5. SIGNAL DESCRIPTIONS*
Mnemonic
VDD
VSS
ROSC
RESET
TEST
AUD
IOC1
IOC2
IOC6
IOC7
PIN No.
9
10
11
13
12
14
8
7
6
5
Type
I
I
I
I
I
O
I/O
I/O
I/O
I/O
Power input
Ground
ROSC Resistor input (Resistor must be connected to VDD)
RESET
TEST MODE
AUDIO OUTPUT
Port C is a 4-bit bi-directional programmable Input / Output port with Pull-high or
Open-drain option.
IOC1: EXT INT IN
IOC2: EXT COUNT IN
**See note 1 and 2 below.
Port D is a 4-bit bi-directional programmable Input / Output port with Pull-low or
IOD0
IOD1
IOD6
IOD7
1
2
3
4
I/O
I/O
I/O
I/O
Open-drain option.
In input mode, Port D can be either Pure or Pull-low states.
In
output mode, Port D can be either Buffer or Open-drain PMOS type (send current).
(Key change, Wake up I/O)
**See note 1 and 2 below.
In input mode, Port C can be in either Pure or Pull-high states.
In output mode, Port C can be a Buffer or Open-drain NMOS type (sink current).
Description
* Refer to SPC Programming Guide for more information.
**Note:
1.) Two input states can be specified: Pure Input, Pull-High or Pull Low.
2.) Three output states can be specified: Buffer output, Open Drain PMOS output (send), or Open Drain NMOS output (sink).
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
4
JUL. 09, 2001
Preliminary Version: 0.1
Preliminary
SPC11A
6. FUNCTIONAL DESCRIPTIONS
6.1. CPU
The microprocessor in SPC11A is a high performance 8-bit
processor equipped Accumulator, Program Counter, X Register,
Stack pointer and Processor Status Register (the same as the
6502 instruction structure).
The maximum CPU speed of 6.0MHz
is capable of bringing you the cleaner speech, pleasant music as
well as achieving the best performance.
Input/Output IOC port : IOC2 - IOC1
logic_2
control
output
data
V
DD
90K
6.2. ROM Area
The ROM area in SPC11A is 12K-byte that can be used for
program as well as data.
buffer or
OD-NMOS
input data
OD : Open Drain
6.3. RAM Area
The total RAM size is 64-bytes (including Stack) starting from
address $C0 through $FF.
Input/Output IOD port : IOD7 - IOD6
input data
OD-PMOS
or buffer
output
6.4. Map of Memory and I/Os
*I/O PORT:
- PORT IOC
IOD
$0004
$0005
$00C0
USER RAM and STACK
$0100
UNUSED
$0400
*INT SOURCE:
- INTA (from TIMER A)
- INTB (from TIMER B)
- CPU CLK / 1024
- CPU CLK / 8192
- CPU CLK / 65536
- EXT INT
$7C00
USER'S PROGRAM &
DATA AREA
$7FFF
$2FFF
DUMMY AREA
$0600
USER'S PROGRAM &
DATA AREA
SUNPLUS TEST
PROGRAM
*MEMORY MAP (From ROM view)
$0000
Hardware register, I/Os
data
logic_4
control
OD : Open Drain
60K
- I/O CONFIG $0000
$0001
*NMI SOURCE:
- INTA (from TIMER A)
Input/Output IOD port : IOD1 - IOD0
input data
OD-PMOS
or buffer
output
data
logic_4
control
OD : Open Drain
60K
6.5. I/O Port Configuration*
Input/Output IOC port : IOC7 - IOC6
logic_2
control
output
data
V
DD
90K
Note:
* Values are for VDD = 5.0V test conditions only.
6.6. Power Saving Mode
The SPC11A includes a power saving mode (Standby mode) for
those applications that require very low standby current.
To enter
standby mode, the Wake-Up Register must be enabled and then
buffer or
OD-NMOS
stop the CPU clock by writing the STOP CLOCK Register to enter
standby mode.
In such mode, RAM and I/Os will remain in their
Port IOD(7, 6, 1, 0) is the
previous states until being awaken.
input data
OD : Open Drain
only wake-up source in the SPC11A. After the SPC11A is
awaken, the internal CPU will go to the RESET State (Tw
≧
65536 x T1) and continue to execute program.
will not affect RAM nor I/Os (FIG.1).
Wakeup Reset
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
5
JUL. 09, 2001
Preliminary Version: 0.1