BUZ111SL
SPP80N05L
SIPMOS
®
Power Transistor
• N channel
• Enhancement mode
• Logic Level
• Avalanche-rated
• d
v
/d
t
rated
• 175°C operating temperature
• also in SMD available
Pin 1
Pin 2
Pin 3
G
D
S
Type
V
DS
55 V
I
D
80 A
R
DS(on
)
0.01
Ω
Package
Ordering Code
BUZ111SL
TO-220 AB
Q67040-S4003-A2
Maximum Ratings
Parameter
Symbol
Values
Unit
Continuous drain current
T
C
= 100 °C
I
D
A
80
Pulsed drain current
T
C
= 25 °C
I
Dpuls
320
E
AS
Avalanche energy, single pulse
I
D
= 80 A,
V
DD
= 25 V,
R
GS
= 25
Ω
L
= 220 µH,
T
j
= 25 °C
mJ
700
I
AR
E
AR
Avalanche current,limited by
T
jmax
Avalanche energy,periodic limited by
T
jmax
Reverse diode d
v
/d
t
I
S
= 80 A,
V
DS
= 40 V, d
i
F
/d
t
= 200 A/µs
T
jmax
= 175 °C
80
25
A
mJ
kV/µs
d
v
/d
t
6
V
GS
P
tot
Gate source voltage
Power dissipation
T
C
= 25 °C
±
14
250
V
W
Semiconductor Group
1
28/Jan/1998
BUZ111SL
SPP80N05L
Maximum Ratings
Parameter
Symbol
Values
Unit
Operating temperature
Storage temperature
Thermal resistance, junction - case
Thermal resistance, junction - ambient
IEC climatic category, DIN IEC 68-1
T
j
T
stg
R
thJC
R
thJA
-55 ... + 175
-55 ... + 175
°C
≤
0.6
≤
62
55 / 175 / 56
K/W
Electrical Characteristics,
at
T
j
= 25°C, unless otherwise specified
Parameter
Symbol
min.
Static Characteristics
Values
typ.
max.
Unit
Drain- source breakdown voltage
V
GS
= 0 V,
I
D
= 0.25 mA,
T
j
= 25 °C
V
(BR)DSS
V
55
-
-
Gate threshold voltage
V
GS=
V
DS,
I
D
= 240 µA
V
GS(th)
1.2
I
DSS
1.6
2
µA
Zero gate voltage drain current
V
DS
= 50 V,
V
GS
= 0 V,
T
j
= -40 °C
V
DS
= 50 V,
V
GS
= 0 V,
T
j
= 25 °C
V
DS
= 50 V,
V
GS
= 0 V,
T
j
= 150 °C
-
-
-
I
GSS
-
0.1
-
0.1
1
100
nA
Gate-source leakage current
V
GS
= 20 V,
V
DS
= 0 V
-
R
DS(on)
10
100
Drain-Source on-resistance
V
GS
= 4.5 V,
I
D
= 80 A
V
GS
= 10 V,
I
D
= 80 A
Ω
-
-
0.0085
0.0055
0.01
0.007
Semiconductor Group
2
28/Jan/1998
BUZ111SL
SPP80N05L
Electrical Characteristics,
at
T
j
= 25°C, unless otherwise specified
Parameter
Symbol
min.
Values
typ.
max.
Unit
Dynamic Characteristics
Transconductance
V
DS
≥
2
*
I
D *
R
DS(on)max
= 2 V,
I
D
= 80 A
g
fs
S
30
95
-
pF
-
3850
4800
Input capacitance
V
GS
= 0 V,
V
DS
= 25 V,
f
= 1 MHz
C
iss
Output capacitance
V
GS
= 0 V,
V
DS
= 25 V,
f
= 1 MHz
C
oss
-
C
rss
1090
1357
Reverse transfer capacitance
V
GS
= 0 V,
V
DS
= 25 V,
f
= 1 MHz
-
t
d(on)
570
715
ns
Turn-on delay time
V
DD
= 30 V,
V
GS
= 4.5 V,
I
D
= 80 A
R
G
= 1.3
Ω
-
t
r
30
45
Rise time
V
DD
= 30 V,
V
GS
= 4.5 V,
I
D
= 80 A
R
G
= 1.3
Ω
-
t
d(off)
37
56
Turn-off delay time
V
DD
= 30 V,
V
GS
= 4.5 V,
I
D
= 80 A
R
G
= 1.3
Ω
-
t
f
70
105
Fall time
V
DD
= 30 V,
V
GS
= 4.5 V,
I
D
= 80 A
R
G
= 1.3
Ω
-
Q
g(th)
36
55
nC
Gate charge at threshold
V
DD
= 40 V,
I
D
≥
0.1 A,
V
GS
=0 to 1 V
-
Q
g(5)
3.8
5.7
Gate charge at 5.0 V
V
DD
= 40 V,
I
D
= 80 A,
V
GS
=0 to 5 V
-
Q
g(total)
92
138
Gate charge total
V
DD
= 40 V,
I
D
= 80 A,
V
GS
=0 to 10 V
-
V
(plateau)
155
232
V
Gate plateau voltage
V
DD
= 40 V,
I
D
= 80 A
-
3.4
-
Semiconductor Group
3
28/Jan/1998
BUZ111SL
SPP80N05L
Electrical Characteristics,
at
T
j
= 25°C, unless otherwise specified
Parameter
Symbol
min.
Reverse Diode
Values
typ.
max.
Unit
Inverse diode continuous forward current
T
C
= 25 °C
I
S
A
-
-
80
Inverse diode direct current,pulsed
T
C
= 25 °C
I
SM
-
V
SD
-
320
V
Inverse diode forward voltage
V
GS
= 0 V,
I
F
= 160 A
-
t
rr
1.25
1.8
ns
Reverse recovery time
V
R
= 30 V,
I
F=
l
S,
d
i
F
/d
t
= 100 A/µs
-
Q
rr
105
157
µC
Reverse recovery charge
V
R
= 30 V,
I
F=
l
S,
d
i
F
/d
t
= 100 A/µs
-
0.31
0.47
Semiconductor Group
4
28/Jan/1998
BUZ111SL
SPP80N05L
Power dissipation
P
tot
=
ƒ
(T
C
)
Drain current
I
D
=
ƒ
(T
C
)
parameter:
V
GS
≥
4 V
90
A
260
W
220
P
tot
200
180
160
140
120
100
80
60
40
I
D
70
60
50
40
30
20
10
20
0
0
20
40
60
80
100 120 140
°C
180
0
0
20
40
60
80
100 120 140
°C
180
T
C
T
C
Safe operating area
I
D
=
ƒ
(V
DS
)
parameter:
D
= 0,
T
C
= 25°C
10
3
Transient thermal impedance
Z
th JC
=
ƒ
(t
p
)
parameter:
D = t
p
/
T
10
0
K/W
D
DS
A
DS
(o
n)
t
= 29.0µs
p
/
I
I
D
10
2
Z
thJC
100 µs
R
=
10
-1
V
10
-2
D = 0.50
1 ms
10
-3
0.20
0.10
10
1
10 ms
0.05
10
-4
single pulse
0.02
0.01
DC
10
0
0
10
10
1
V 10
2
10
-5
-7
10
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
s 10
0
V
DS
t
p
Semiconductor Group
5
28/Jan/1998
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