PROFET®
BTS721L1
Smart Four Channel Highside Power Switch
•
Overload protection
•
Current limitation
•
Short-circuit protection
•
Thermal shutdown
•
Overvoltage protection
(including load dump)
•
Fast demagnetization of inductive loads
•
Reverse battery protection
1)
•
Undervoltage and overvoltage shutdown
with auto-restart and hysteresis
•
Open drain diagnostic output
•
Open load detection in ON-state
•
CMOS compatible input
•
Loss of ground and loss of V
bb
protection
•
Electrostatic discharge
(ESD) protection
Features
Product Summary
Overvoltage Protection
Operating voltage
active channels:
On-state resistance
R
ON
Nominal load current
I
L(NOM)
Current limitation
I
L(SCr)
V
bb(AZ)
43
V
V
bb(on)
5.0 ... 34
V
two parallel four parallel
one
100
50
25
mΩ
2.9
4.3
6.3
A
8
8
8
A
P-DSO-20
Application
• µC
compatible power switch with diagnostic feedback
for 12 V and 24 V DC grounded loads
•
All types of resistive, inductive and capacitive loads
•
Replaces electromechanical relays and discrete circuits
General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic
feedback, monolithically integrated in Smart SIPMOS technology. Providing embedded protective functions.
Pin Definitions and Functions
Pin
1,10,
11,12,
15,16,
19,20
3
5
7
9
18
17
14
13
4
8
2
6
Symbol Function
V
bb
Positive power supply voltage.
Design the
wiring for the simultaneous max. short circuit
currents from channel 1 to 4 and also for low
thermal resistance
IN1
Input 1 .. 4,
activates channel 1 .. 4 in case of
IN2
logic high signal
IN3
IN4
OUT1
Output 1 .. 4,
protected high-side power output
OUT2
of channel 1 .. 4. Design the wiring for the
OUT3
max. short circuit current
OUT4
ST1/2
Diagnostic feedback 1/2
of channel 1 and
channel 2, open drain, low on failure
ST3/4
Diagnostic feedback 3/4
of channel 3 and
channel 4, open drain, low on failure
GND1/2
Ground 1/2
of chip 1 (channel 1 and channel 2)
GND3/4
Ground 3/4
of chip 2 (channel 3 and channel 4)
Pin configuration
(top view)
V
bb
GND1/2
IN1
ST1/2
IN2
GND3/4
IN3
ST3/4
IN4
V
bb
1
2
3
4
5
6
7
8
9
10
•
20
19
18
17
16
15
14
13
12
11
V
bb
V
bb
OUT1
OUT2
V
bb
V
bb
OUT3
OUT4
V
bb
V
bb
1
)
With external current limit (e.g. resistor R
GND
=150
Ω)
in GND connection, resistor in series with ST
connection, reverse load current limited by connected load.
Semiconductor Group
1 of 15
2003-Oct-01
BTS721L1
Block diagram
Four Channels; Open Load detection in on state;
+ V bb
Channel 1
Voltage
source
V
Logic
Voltage
sensor
Overvoltage
protection
Current
limit 1
Gate 1
protection
Leadframe
Level shifter
Rectifier 1
Charge
pump 1
Charge
pump 2
Limit for
unclamped
ind. loads 1
Open load
Short to Vbb
detection 1
Current
limit 2
Gate 2
protection
OUT1
18
3
5
4
IN1
IN2
ST1/2
Temperature
sensor 1
ESD
Logic
Channel 2
2
GND1/2
Level shifter
Rectifier 2
Limit for
unclamped
ind. loads 2
Open load
Short to Vbb
detection 2
OUT2
17
Load
Temperature
sensor 2
R
R
O1
O2
GND1/2
Signal GND
Chip 1
Chip 1
Load GND
+ V bb
Channel 3
Leadframe
Logic and protection circuit of chip 2
(equivalent to chip 1)
7
9
8
IN3
IN4
ST3/4
OUT3
14
Channel 4
OUT4
13
Load
6
GND3/4
PROFET
Signal GND
Chip 2
R
R
O3
O4
GND3/4
Load GND
Chip 2
Leadframe connected to pin 1, 10, 11, 12, 15, 16, 19, 20
Semiconductor Group
2
2003-Oct-01
BTS721L1
Maximum Ratings
at
T
j
= 25°C unless otherwise specified
Parameter
Supply voltage (overvoltage protection see page 4)
Supply voltage for full short circuit protection
T
j,start
= -40 ...+150°C
Load current (Short-circuit current, see page 5)
Load dump protection
2
)
V
LoadDump
=
U
A
+
V
s
,
U
A
= 13.5 V
R
I
3
)
= 2
Ω,
t
d
= 200 ms; IN = low or high,
each channel loaded with
R
L
= 4.7
Ω,
Operating temperature range
Storage temperature range
Power dissipation (DC)
5
T
a
= 25°C:
(all channels active)
T
a
= 85°C:
Inductive load switch-off energy dissipation, single pulse
V
bb
= 12V,
T
j,start
= 150°C
5)
,
one channel:
I
L
= 2.9 A, Z
L
= 58 mH, 0
Ω
I
L
= 4.3 A, Z
L
= 58 mH, 0
Ω
two parallel channels:
I
L
= 6.3 A, Z
L
= 58 mH, 0
Ω
four parallel channels:
see diagrams on page 9 and page 10
Symbol
V
bb
V
bb
I
L
V
Load
4
)
dump
Values
43
34
self-limited
60
-40 ...+150
-55 ...+150
3.7
1.9
Unit
V
V
A
V
°C
W
T
j
T
stg
P
tot
E
AS
0.3
0.65
1.5
1.0
-10 ... +16
±2.0
±5.0
J
Electrostatic discharge capability (ESD)
(Human Body Model)
Input voltage (DC)
Current through input pin (DC)
Current through status pin (DC)
see internal circuit diagram page 8
V
ESD
V
IN
I
IN
I
ST
kV
V
mA
Thermal resistance
junction - soldering point
5),6)
junction - ambient
5)
each channel:
one channel active:
all channels active:
R
thjs
R
thja
15
41
34
K/W
2
)
3)
4)
5
)
6
)
Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins, e.g. with a
150
Ω
resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for input
protection is integrated.
R
I
= internal resistance of the load dump test pulse generator
V
Load dump
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 15
Soldering point: upper side of solder edge of device pin 15. See page 15
Semiconductor Group
3
2003-Oct-01
BTS721L1
Electrical Characteristics
Parameter and Conditions,
each of the four channels
at T
j
= 25 °C,
V
bb
= 12 V unless otherwise specified
Symbol
Values
min
typ
max
Unit
Load Switching Capabilities and Characteristics
On-state resistance (Vbb to OUT)
I
L
= 2 A
each channel,
T
j
= 25°C:
R
ON
T
j
= 150°C:
two parallel channels,
T
j
= 25°C:
four parallel channels,
T
j
= 25°C:
Nominal load current
one channel active:
two parallel channels active:
four parallel channels active:
Device on PCB
5)
,
T
a
=
85°C,
T
j
≤
150°C
Output current while GND disconnected or pulled
up; V
bb
= 30 V,
V
IN
= 0, see diagram page 9
Turn-on time
to 90%
V
OUT
:
Turn-off time
to 10%
V
OUT
:
R
L
= 12
Ω
,
T
j
=-40...+150°C
Slew rate on
10 to 30%
V
OUT
,
R
L
= 12
Ω
,
T
j
=-40...+150°C:
Slew rate off
70 to 40%
V
OUT
,
R
L
= 12
Ω
,
T
j
=-40...+150°C:
Operating Parameters
Operating voltage
7
)
Undervoltage shutdown
Undervoltage restart
T
j
=-40...+150°C:
T
j
=-40...+150°C:
T
j
=-40...+25°C:
T
j
=+150°C:
Undervoltage restart of charge pump
see diagram page 14
T
j
=-40...+150°C:
Undervoltage hysteresis
∆V
bb(under)
=
V
bb(u rst)
-
V
bb(under)
Overvoltage shutdown
T
j
=-40...+150°C:
Overvoltage restart
T
j
=-40...+150°C:
Overvoltage hysteresis
T
j
=-40...+150°C:
Overvoltage protection
8
)
T
j
=-40...+150°C:
I
bb
= 40 mA
Standby current, all channels off
T
j
=25°C
:
V
IN
= 0
T
j
=150°C:
--
85
170
43
22
2.9
4.3
6.3
--
200
200
--
--
100
200
50
25
--
mΩ
I
L(NOM)
2.5
3.8
5.9
--
80
80
0.1
0.1
A
I
L(GNDhigh)
t
on
t
off
dV/dt
on
-dV/dt
off
10
400
400
1
1
mA
µs
V/µs
V/µs
V
bb(on)
V
bb(under)
V
bb(u rst)
V
bb(ucp)
∆V
bb(under)
V
bb(over)
V
bb(o rst)
∆V
bb(over)
V
bb(AZ)
I
bb(off)
5.0
3.5
--
--
--
34
33
--
42
--
--
--
--
--
5.6
0.2
--
--
0.5
47
28
44
34
5.0
5.0
7.0
7.0
--
43
--
--
--
60
70
V
V
V
V
V
V
V
V
V
µA
7)
8)
At supply voltage increase up to
V
bb
= 5.6 V typ without charge pump,
V
OUT
≈V
bb
- 2 V
see also
V
ON(CL)
in circuit diagram on page 8.
Semiconductor Group
4
2003-Oct-01
BTS721L1
Parameter and Conditions,
each of the four channels
at T
j
= 25 °C,
V
bb
= 12 V unless otherwise specified
Symbol
Values
min
typ
max
--
--
12
Unit
µA
Leakage output current (included in
I
bb(off)
)
I
L(off)
V
IN
= 0
Operating current
9)
,
V
IN
= 5V,
T
j
=-40...+150°C
I
GND
=
I
GND1/2
+
I
GND3/4
,
one channel on:
I
GND
four channels on:
Protection Functions
10)
Initial peak short circuit current limit,
(see timing
diagrams, page 12)
--
--
2
8
3
12
mA
each channel,
T
j
=-40°C:
I
L(SCp)
11
18
25
9
14
22
T
j
=25°C:
5
8
14
T
j
=+150°C:
two parallel channels
twice the current of one channel
four parallel channels
four times the current of one channel
Repetitive short circuit current limit,
T
j
=
T
jt
each channel
I
L(SCr)
--
8
--
--
8
--
two parallel channels
--
8
--
four parallel channels
(see timing diagrams, page 12)
A
A
Initial short circuit shutdown time
T
j,start
=-40°C:
t
off(SC)
T
j,start
= 25°C:
V
ON(CL)
T
jt
∆
T
jt
--
--
--
150
--
3.8
3
47
--
10
--
--
--
--
--
ms
(see page 12 and timing diagrams on page 12)
Output clamp (inductive load switch off)
11)
at V
ON(CL)
= V
bb
- V
OUT
Thermal overload trip temperature
Thermal hysteresis
Reverse Battery
Reverse battery voltage
12
)
Drain-source diode voltage
(V
out
> V
bb
)
I
L
= - 2.9 A,
T
j
= +150°C
V
°C
K
-V
bb
-V
ON
--
--
--
610
32
--
V
mV
9
)
Add
I
ST
, if
I
ST
> 0
10
) Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
11
) If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
V
ON(CL)
12
) Requires a 150
Ω
resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal
operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature
protection is not active during reverse current operation! Input and Status currents have to be limited (see
max. ratings page 3 and circuit page 8).
Semiconductor Group
5
2003-Oct-01
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