General-Purpose Power Controller
(GPPC)
PSB 2121
CMOS IC
Features
q
Switched mode DC/DC-converter
q
CCITT ISDN compatible
q
Low power dissipation
q
Supply voltage range 8 to 70 V
q
Programmable input undervoltage protection
q
Programmable overcurrent protection
q
Soft start
q
Power housekeeping input
q
Oscillator synchronization input/output
q
High voltage CMOS-technology 70 V
P-DSO-20-1
P-DIP-16
Type
PSB 2121-P
PSB 2121-T
Version
V A4/A5
V A4/A5
Ordering Code
Q67100-H8646
Q67100-H6032
Package
P-DIP-16
P-DSO-20-1 (SMD)
The PSB 2121 is a pulse width modulator circuit designed for fixed-frequency switching regulators
with very low power consumption.
In telephony and ISDN systems a high conversion yield is crucial to maintain functionality in all
supply conditions via “S” or “U” interfaces. The PSB 2121 design and technology realize high
conversion efficiency and low power dissipation.
It should be recognized that the PSB 2121 can also be used in numerous DC/DC-conversion
systems other than ISDN-power supplies.
Semiconductor Group
1
12.92
PSB 2121
The PSB 2121 Contains the Following Functional Blocks
q
Undervoltage lockout
q
Temperature compensated voltage reference
q
Sawtooth oscillator
q
Error amplifier
q
Pulse width modulator
q
Digital current limiting
q
Soft start
q
Double pulse inhibit
q
Power driver
Together with few external components it provides a stable 5 V DC-supply for subscriber terminals
(TEs) or network terminations (NTs). It can also be programmed for higher output voltages, e.g. to
supply S-lines with 40 V.
Pin Configurations
(top view)
P-DSO-20
P-DIP-16
Semiconductor Group
2
PSB 2121
Pin Definitions and Functions
Pin No. Pin No. Symbol Input (I)
P-DSO P-DIP
Output (O)
1
2
4
5
6
1
2
3
4
5
Definition
Reference
voltage
Positive current
sense
Negative
current sense
Ground
Gate
Function
Output of the 4.0 V reference
voltage.
When the voltage difference
between these two pins exceeds
100 mV, the digital current limiting
becomes active.
All analog and digital signals are
referred to this pin.
Totem-pole output driver, has to be
connected with the gate of an
external power switch.
Output of the internal CMOS
supply. Via
V
EXT
the internal CMOS-
circuits can be supplied from an
external DC-supply in order to
reduce chip power dissipation.
The capacitor at this pin determines
the soft start characteristic.
V
REF
I
P
I
N
GND
GA
O
I
I
I
O
7
6
V
EXT
I/O
External supply
9
10
11
12
14
15
16
17
7
8
9
10
11
12
13
14
C
SS
V
S
PWMP
EO
I
I
I
O
I
I
I
I/O
Soft start
capacitor
Battery voltage
Pulse width
modulator
Positive
voltage sense
Negative
voltage sense
Undervoltage
detection
V
S
is the positive input voltage.
Non-inverting input of the pulse
width modulator.
Error amplifier output.
Non-inverting input of the error
amplifier.
Inverting input of the error amplifier.
The undervoltage lockout can be
programmed via UV.
V
P
V
N
UV
SYNC
Synchronization This pin can be used as an input for
synchronization of the oscillator to
an external frequency, or as an
output to synchronize multiple
devices.
R-oscillator
C-oscillator
The external timing components of
the ramp generator are attached to
OR and OC.
19
20
15
16
OR
OC
I
I
Semiconductor Group
3
PSB 2121
Absolute Maximum Ratings
Parameter
Supply voltage (pin
V
S
) referred to GND
Analog input voltage
(pins
I
P
,
I
N
, PWMP,
V
P
,
V
N
, SYNC, OR, OC)
referred to GND
Reference output current (pin
V
REF
)
SYNC output current (pin SYNC)
Error amplifier output current (pin EO)
Z-current (pin
V
EXT
)
Output current (pin
V
EXT
)
Driver output current (pin GA)
Ambient temperature under bias
Storage temperature
Symbol
Limit Values
80
6
Unit
V
V
V
S
V
I A
I
O REF
I
O SYNC
I
O Amp
I
Z EXT
I
O EXT
I
D R
T
A
T
stg
–5
–5
–5
2
–5
–5
– 25 to 85
– 40 to 125
mA
mA
mA
mA
mA
mA
˚C
˚C
DC-Characteristics
T
A
= 0 to 70 ˚C,
V
S
= 9 to 70 V
Limit Values
Parameter
Supply current
Reference
V
REF
Output voltage
Symbol
min.
typ.
30
max.
50
Unit
µA
Test Condition
I
S
V
S EXT
≥
6.2 V
V
REF O
3.92
4.0
4.08
V
T
A
= 25 ˚C
I
L
= 0 mA,
V
S
= 40 V
V
S
= 20 to 60 V
T
A
= 25 ˚C
I
L
= 0 mA
I
L
= 0.1 to 0.3 mA
V
S
= 40 V,
T
A
= 25 ˚C
0 … 70 ˚C
Line regulation
V
REF Line
60
mV
Load regulation
V
REF Load
20
40
mV
Temperature stability
Load current
V
REF TS
I
REF Load
25
0.5
mV
mA
Semiconductor Group
5
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