4M
x
36-Bit EDO - DRAM Module
HYM364025S/GS-50/-60
•
SIMM modules with 4 194 304 words by 36-Bit organization
for PC main memory applications
Fast access and cycle time
50 ns access time
84 ns cycle time (-50 version)
60 ns access time
104 ns cycle time (-60 version)
Hyper Page Mode (EDO) capability
20 ns cycle time (-50 version)
25 ns cycle time (-60 version)
Single + 5 V (± 10 %) supply
Low power dissipation
max. 6820 mW active (-50 version)
max. 6160 mW active (-60 version)
CMOS – 66 mW standby
TTL –132 mW standby
CAS-before-RAS refresh
RAS-only-refresh
Hidden-refresh
Decoupling capacitors mounted on substrate
All inputs, outputs and clocks fully TTL compatible
72 pin Single in-Line Memory Module (L-SIM-72-12) with 22.9 mm (900 mil) height
Utilizes eight 4Mx4-EDO-DRAMs and four 4Mx1-EDO-DRAMs in SOJ packages
2048 refresh cycles / 32 ms
Optimized for use in byte-write parity applications
Tin-Lead contact pads (S-version)
Gold contact pads (GS - version)
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Semiconductor Group
1
4.97
HYM 364025S/GS-50/-60
4M
×
36-Bit EDO-Module
The HYM 364025S/GS-50/-60 is a 16 MByte DRAM module organized as 4 194 304 words by
36-Bit in a 72-pin single-in-line package comprising eight HYB 5117405BJ 4M
×
4 EDO-DRAMs
and four HYB 514105BJ 4M x 1 EDO-DRAMs in 300 mil wide SOJ-packages mounted together with
ceramic decoupling capacitors on a PC board.
Each HYB 5117405BJ and HYB 514105BJ is described in the data sheet and is fully electrical
tested and processed according to SIEMENS standard quality procedure prior to module assembly.
After assembly onto the board, a further set of electrical tests is performed.
The speed of the module can be detected by the use of four presence detect pins.
The common I/O feature on the HYM 364025S/GS-50/-60 dictates the use of early write cycles.
Ordering Information
Type
HYM 364025S-50
HYM 364025S-60
HYM 364025GS-50
HYM 364025GS-60
Ordering Code
on request
Q67100-Q2366
on request
Q67100-Q2367
Package
L-SIM-72-12
L-SIM-72-12
L-SIM-72-12
L-SIM-72-12
Description
EDO-DRAM Module
(access time 50 ns)
EDO-DRAM Module
(access time 60 ns)
EDO-DRAM Module
(access time 50 ns)
EDO-DRAM Module
(access time 60 ns)
Semiconductor Group
2
HYM 364025S/GS-50/-60
4M
×
36-Bit EDO-Module
Pin Configuration
Pin Names
VSS
DQ18
DQ19
DQ20
DQ21
N.C.
A1
A3
A5
A10
DQ22
DQ23
DQ24
DQ25
N.C.
A8
N.C.
DQ26
1 DQ0
2
3 DQ1
4
5 DQ2
6
7 DQ3
8
9 VCC 10
11 A0
12
13 A2
14
15 A4
16
17 A6
18
19 DQ4 20
21 DQ5 22
23 DQ6 24
25 DQ7 26
27 A7
28
29 VCC 30
31 A9
32
33 RAS2 34
35 DQ8 36
A0-A10
DQ0-DQ35
CAS0 - CAS3
RAS0, RAS2
WE
Address Inputs
Data Input/Output
Column Address Strobe
Row Address Strobe
Read/Write Input
Power (+ 5 V)
Ground
Presence Detect Pin
No Connection
V
CC
V
SS
PD
N.C.
DQ17
VSS
CAS2
CAS1
N.C.
WE
DQ9
DQ10
DQ11
DQ12
DQ13
VCC
DQ14
DQ15
DQ16
PD0
PD2
N.C.
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
DQ35 38
CAS0 40
CAS3 42
RAS0 44
N.C. 46
N.C. 48
DQ27 50
DQ28 52
DQ29 54
DQ30 56
DQ31 58
DQ32 60
DQ33 62
DQ34 64
N.C. 66
PD1 68
PD3 70
VSS 72
Presence Detect Pins
-50
PD0
PD1
PD2
PD3
-60
V
SS
N.C.
V
SS
N.C.
N.C.
N.C.
V
SS
V
SS
Semiconductor Group
3
HYM 364025S/GS-50/-60
4M
×
36-Bit EDO-Module
RAS0
CAS0
DQ0-DQ3
CAS RAS
I/O1-I/O4
OE
D0
CAS RAS
I/O1-I/O4
OE
D1
Di
Do
CAS RAS
M0
DQ4-DQ7
DQ8
CAS1
DQ9-DQ12
CAS RAS
I/O1-I/O4
OE
D2
CAS RAS
I/O1-I/O4
OE
D3
Di
Do
CAS RAS
M1
DQ13-DQ16
DQ17
RAS2
CAS2
DQ18-DQ21
DQ22-DQ25
DQ26
CAS3
CAS RAS
I/O1-I/O4
OE
D4
CAS RAS
I/O1-I/O4
OE
D5
Di
Do
CAS RAS
M2
DQ27-DQ30
DQ31-DQ34
CAS RAS
I/O1-I/O4
OE
D6
CAS RAS
I/O1-I/O4
D7
OE
Di
Do
CAS RAS
M3
VCC
VSS
C0 - C11
DQ35
A0-A10
WE
D0-D7, M0-M3
D0-D7, M0-M3
Block Diagram
Semiconductor Group
4
HYM 364025S/GS-50/-60
4M
×
36-Bit EDO-Module
Absolute Maximum Ratings
Operation temperature range ......................................................................................... 0 to + 70 °C
Storage temperature range......................................................................................... – 55 to 125 °C
Input/output voltage ............................................................................ –0.5V to min (Vcc+0.5, 7.0) V
Power supply voltage...................................................................................................... – 1 to + 7 V
Power dissipation..................................................................................................................... 8.7 W
Data out current (short circuit) ................................................................................................ 50 mA
Note:
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent
damage of the device. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
DC Characteristics
T
A
= 0 to 70 °C,
V
CC
= 5 V
±
10 %
Parameter
Input high voltage
Input low voltage
Output high voltage (
I
OUT
= – 5 mA)
Output low voltage (
I
OUT
= 4.2 mA)
Input leakage current
(0 V <
V
IN
< 6.5 V, all other pins = 0 V)
Output leakage current
(DO is disabled, 0 V <
V
OUT
< 5.5 V)
Symbol
Limit Values
min.
max.
Vcc+0.5
0.8
–
0.4
20
10
V
V
V
V
µA
µA
2.4
– 0.5
2.4
–
– 20
– 10
Unit
Test
Condition
1)
1)
1)
1)
1)
1)
V
IH
V
IL
V
OH
V
OL
I
I(L)
I
O(L)
I
CC1
Average
V
CC
supply current
(RAS, CAS, address cycling,
t
RC
=
t
RC
min)
50 ns - Version
60 ns - Version
Standby
V
CC
supply current
(RAS = CAS =
V
IH
)
Average
V
CC
supply current
during RAS only refresh cycles
(RAS cycling, CAS =
V
IH
,
t
RC
=
t
RC
min)
50 ns - Version
60 ns - Version
–
–
–
1240
1120
16
mA
mA
mA
2) 3) 4)
I
CC2
I
CC3
–
–
1240
1120
mA
mA
2) 4)
Semiconductor Group
5
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