DSC1105/25
Low EMI, Low-Jitter Precision CMOS Oscillator
Features
• Low Drive Strength for EMI Reduction
• Low RMS Phase Jitter: <1 ps (typ.)
• High Stability: ±10 ppm, ±20 ppm, ±25 ppm,
±50 ppm
• Wide Temperature Range:
- Automotive: –55°C to +125°C
- Ext. Industrial: –40°C to +105°C
- Industrial: –40°C to +85°C
- Commercial: –20°C to +70°C
• High Supply Noise Rejection: –50 dBc
• Wide Freq. Range: 2.3 MHz to 100 MHz
• Small Industry Standard Footprints
- 2.5 mm x 2.0 mm, 3.2 mm x 2.5 mm, 5.0 mm
x 3.2 mm, and 7.0 mm x 5.0 mm
• Excellent Shock and Vibration Immunity
- Qualified to MIL-STD-883
• High Reliability
- 20x Better MTF than Quartz Oscillators
• Low Current Consumption
• Supply Range of 2.25 to 3.6V
• Standby and Output Enable Function
• Lead-Free and RoHS Compliant
General Description
The DSC1105 and DSC1125 series of high
performance oscillators utilize a proven silicon MEMS
technology to provide excellent jitter and stability over
a wide range of supply voltages and temperatures. By
eliminating the need for quartz or SAW technology,
MEMS oscillators significantly enhance reliability and
accelerate product development, while meeting
stringent clock performance criteria for a variety of
communications, storage, and networking applications.
DSC1105 has a standby feature that allows it to
completely power-down when EN pin is pulled low;
whereas for DSC1125, only the outputs are disabled
when EN is low. Both oscillators are available in
industry standard packages, including the small
2.5 mm x 2.0 mm, and are “drop-in” replacements for
standard 4-pin CMOS quartz crystal oscillators. The
DSC1105/25 is functionally equivalent to the
DSC1101/21, but it has lower drive strength for EMI
reduction.
Functional Block Diagram
Applications
• Storage Area Networks
- SATA, SAS, Fibre Channel
• Passive Optical Networks
- EPON, 10G-EPON,V GPON, 10G-PON
• Ethernet
- 1G, 10GBASE-T/KR/LR/SR, and FCoE
• HD/SD/SDI Video and Surveillance
• PCI Express
• Display Port
2017 Microchip Technology Inc.
DS20005869A-page 1
DSC1105/25
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
Input Voltage, V
IN
..............................................................................................................................–0.3V to V
DD
+ 0.3V
Supply Voltage .......................................................................................................................................... –0.3V to +4.0V
ESD Protection On All Pins ........................................................................................... 4000V HBM, 1500V CDM (max.)
† Notice:
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
Note:
1000+ years of data retention on internal memory.
TABLE 1-1:
DC CHARACTERISTICS
Sym.
V
DD
Min.
2.25
—
Typ.
—
—
20
31
—
—
—
—
—
—
—
—
—
—
40
Max.
3.6
0.095
22
35
±10
±20
—
—
—
—
0.75
V
DD
—
—
—
—
—
±25
±50
±5
5
—
0.25
V
DD
5
5
20
—
ppm
ms
V
ns
ms
ns
k
ppm
mA
Units
V
—
DSC1105, EN pin low, output
is disabled
DSC1125, EN pin low, output
is disabled
Output is enabled
C
L
= 15 pF, F
0
= 100 MHz
Ext Comm. & Ind. only
All temp ranges
All temp ranges
All temp ranges
1 year @ 25°C
T = 25°C
Input Logic High
Input Logic Low
—
DSC1105
DSC1125
Pull-up Resistor Exist
Conditions
Parameters
Supply Voltage
(Note
1)
Supply Current
I
DD
—
—
Frequency Stability
(Including frequency
variations due to initial
tolerance, temp. and
power supply voltage.)
Aging
Startup Time (Note
2)
Input Logic Levels
Output Disable Time
(Note
3)
Output Enable Time
Enable Pull-up Resistor
(Note
4)
CMOS Output
—
f
f
t
SU
V
IH
V
IL
t
DS
t
EN
—
V
OH
Output Logic Levels
V
OL
t
R
Output Transition Time
t
F
0.9
V
DD
—
—
—
—
—
4
4.7
—
0.1
V
DD
5
ns
6
V
Output Logic High
I = ±1.6 mA
Output Logic Low
I = ±1.6 mA
Rise Time
20% to 80%, C
L
= 15 pF
Fall Time
20% to 80%, C
L
= 15 pF
DS20005869A-page 2
2017 Microchip Technology Inc.
DSC1105/25
TABLE 1-1:
DC CHARACTERISTICS (CONTINUED)
Sym.
Min.
2.3
Frequency
f
0
3.3
Output Duty Cycle
Period Jitter
Integrated Phase Noise
Note 1:
2:
3:
4:
SYM
J
PER
J
PH
45
—
—
—
—
—
—
4
0.3
0.38
1.7
100
55
—
—
—
2
ps
RMS
%
ps
RMS
Typ.
—
Max.
100
MHz
Units
Conditions
C
L
= 15 pF, –20°C to +70°C
and –40°C to +85°C
C
L
= 15 pF, –40°C to +105°C
and –55°C to +125°C
—
F
OUT
= 100 MHz
200 kHz to 20 MHz @ 100 MHz
100 kHz to 20 MHz @ 100 MHz
12 kHz to 20 MHz @ 100 MHz
Parameters
Pin 6 V
DD
should be filtered with 0.1 µF capacitor.
t
SU
is time to 100 ppm of output frequency after V
DD
is applied and outputs are enabled.
Output Waveform and Test Circuit figures define the parameters.
Output is enabled if pad is floated or not connected.
2017 Microchip Technology Inc.
DS20005869A-page 3
DSC1105/25
TEMPERATURE SPECIFICATIONS (Note
1)
Parameters
Operating Temperature Range (T)
Sym.
T
A
T
A
T
A
T
A
Junction Operating Temperature
Storage Temperature Range
Soldering Temperature Range
Note 1:
T
J
T
A
T
S
Min.
–20
–40
–40
–55
—
–40
—
Typ.
—
—
—
—
—
—
—
Max.
+70
+85
+105
+125
+150
+150
+260
Units
°C
°C
°C
°C
°C
°C
°C
Conditions
Ordering Option E
Ordering Option I
Ordering Option L
Ordering Option M
—
—
40 sec. max
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature and the thermal resistance from junction to air (i.e., T
A
, T
J
,
JA
). Exceeding the
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability.
DS20005869A-page 4
2017 Microchip Technology Inc.
FPGA/CPLD
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