Supertex inc.
HV2701
Low Charge Injection 16-Channel
High Voltage Analog Switch with Bleed Resistors
Features
►
►
►
►
►
►
►
►
►
►
►
►
►
HVCMOS technology for high performance
Integrated bleed resistors on the outputs
16-channel high voltage analog switch
3.3V input logic level compatible
20MHz data shift clock frequency
Very low quiescent power dissipation (-10µA)
Low parasitic capacitance
DC to 50MHz small signal frequency response
-60dB typical OFF-isolation at 5.0MHz
CMOS logic circuitry for low power
Excellent noise immunity
Cascadable serial data register with latches
Flexible operating supply voltages
General Description
The Supertex HV2701 is a low charge injection, 16-channel, high
voltage, analog switch integrated circuit (IC) with bleed resistors.
The device can be used in applications requiring high voltage
switching controlled by low voltage control signals, such as medical
ultrasound imaging and piezoelectric transducer drivers. The bleed
resistors eliminate voltage built up on capacitive loads such as
piezoelectric transducers.
Input data are shifted into a 16-bit shift register that can then be
retained in a 16-bit latch. To reduce any possible clock feed-through
noise, the latch enable bar should be left high until all bits are
clocked in. Data is clocked in during the rising edge of the clock.
Using HVCMOS technology, this device combines high voltage
bilateral DMOS switches and low power CMOS logic to provide
efficient control of high voltage analog signals.
The device is suitable for various combinations of high voltage
supplies, e.g., V
PP
/V
NN
: +40V/-160V, +100V/-100V, and +160V/-40V.
Applications
►
►
►
►
Medical ultrasound imaging
NDT metal flaw detection
Piezoelectric transducer drivers
Optical MEMS modules
Block Diagram
Latches
D
LE
CLR
D
LE
CLR
Level
Shifters
Output
Switches
SW0
SW1
DIN
CLK
16-Bit
Shift
Register
D
LE
CLR
SW2
DOUT
D
LE
CLR
D
LE
CLR
SW14
SW15
VDD GND
Doc.# DSFP-HV2701
E012412
LE CLR
VNN VPP
RGND
Supertex inc.
www.supertex.com
HV2701
Ordering Information
Package Options
Device
42-Ball Bumped Die 48-Lead LQFP
5.29x5.30mm body
1.01mm height (max)
0.52 / 0.60mm pitch
7.00x7.00mm body
1.60mm height (max)
0.50mm pitch
7.00x8.00mm body
1.20mm height (max)
0.75mm pitch
Pin Configurations
3
2
7
13
18
22
26
34
42
33
41
12
17
21
25
32
40
31
39
30
38
11
16
6
10
5
9
15
20
24
29
37
4
8
14
19
23
28
36
27
35
1
48-Ball fpBGA
HV2701
HV2701BD M936
HV2701FG-G
HV2701GA-G
-G indicates package is RoHS compliant (‘Green’).
Bumped Die package is RoHS compliant (‘Green’).
M936 specifies product in tape and reel.
42-Ball Bumped Die (BD)
(top view)
1
48
Absolute Maximum Ratings
Parameter
V
DD
logic supply
V
PP
-V
NN
differential supply
Value
-0.5V to +7.0V
220V
-0.5V to V
NN
+200V
+0.5V to -200V
V
NN
to V
PP
V
PP
positive supply
V
NN
negative supply
Logic input voltage
Analog signal range
Peak analog signal current/channel
Storage temperature
Power dissipation:
42-Ball Bumped Die (BD)
48-Lead LQFP (FG)
48-Ball fpBGA (GA)
-0.5V to V
DD
+0.3V
48-Lead LQFP (FG)
(top view)
2
3
4
5
1
A
B
C
D
E
F
G
H
6
3.0A
-65°C to 150°C
1.5W
1.0W
1.0W
Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied. Continuous operation of the device at
the absolute rating level may affect device reliability. All voltages are referenced to device ground.
48-Ball fpBGA (GA)
(top view)
Recommended Operating Conditions
Sym
V
DD
V
PP
V
NN
V
IH
V
IL
V
SIG
T
A
Parameter
Logic power supply voltage
Positive high voltage supply
Negative high voltage supply
High level input voltage
Low level input voltage
Analog signal voltage
peak-to-peak
Operating free air temperature
Value
3.0V to 5.5V
+40V to V
NN
+200V
-40V to -160V
0.9V
DD
to V
DD
0V to 0.1V
DD
V
NN
+10V to V
PP
-10V
0°C to 70°C
Product Marking
LLLLLLL
YYWW
HV2701BD
YY = Year Sealed
WW = Week Sealed
L = Lot Number
Package may or may not include the following marks: Si or
42-Ball Bumped Die (BD)
Top Marking
Notes:
1.
Power up/down sequence is arbitrary except GND must be powered-up first
and powered-down last.
2. V
SIG
must be within V
NN
and V
PP
or floating during power up/down transition.
3. Rise and fall times of power supplies V
DD
, V
PP
, and V
NN
should not be less than
1.0msec.
YY = Year Sealed
WW = Week Sealed
LLLLLL LLL
L = Lot Number
Bottom Marking
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
CCCCCCCC
H V27 01FG
YYWW
AAA
*May be part of top marking
Package may or may not include the following marks: Si or
48-Lead LQFP (FG)
YY = Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging
Packages may or may not include the following marks: Si or
YYWW
HV2701GA
LLLLLLLLL
48-Ball fpBGA (GA)
Doc.# DSFP-HV2701
E012412
2
Supertex inc.
www.supertex.com
HV2701
DC Electrical Characteristics
Sym
Parameter
Min
-
-
R
ONS
Small signal switch
ON-resistance
-
-
-
-
∆R
ONS
R
ONL
R
INT
I
SOL
V
OS
I
PPQ
I
NNQ
I
PPQ
I
NNQ
I
SW
f
SW
Small signal switch
ON-resistance matching
Large signal switch
ON-resistance
Value of output bleed resistor
Switch OFF leakage per
switch*
DC offset switch OFF*
DC offset switch ON*
Quiescent V
PP
supply current
Quiescent V
NN
supply current
Quiescent V
PP
supply current
Quiescent V
NN
supply current
Switch output peak current
Output switching frequency
-
-
-
-
-
-
-
-
-
-
-
-
-
I
PP
Average V
PP
supply current
-
-
-
I
NN
Average V
NN
supply current
-
-
I
DD
I
DDQ
I
SOR
I
SINK
C
IN
Average V
DD
supply current
Quiescent V
DD
supply current
Data out source current
Data out sink current
Logic input capacitance
-
-
0.45
0.45
-
(over recommended operating conditions unless otherwise noted)
0°C
Max
30
25
25
18
23
22
20
-
-
5.0
300
500
-
-
-
-
3.0
-
6.5
4.0
4.0
6.5
4.0
4.0
4.0
10
-
-
10
Min
-
-
-
-
-
-
-
-
20
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.45
0.45
-
+25°C
Typ
26
22
22
18
20
16
5.0
15
35
1.0
100
100
10
-10
10
-10
3.0
-
-
-
-
-
-
-
-
-
0.70
0.70
-
Max
38
27
27
24
25
25
20
-
50
10
300
500
50
-50
50
-50
2.0
50
7.0
5.5
5.0
7.0
5.0
5.0
4.0
10
-
-
10
+70°C
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.40
0.40
-
Max
48
32
30
27
30
27
20
-
-
15
300
500
-
-
-
-
2.0
-
8.0
5.5
5.5
8.0
5.5
5.5
4.0
10
-
-
10
mA
µA
mA
mA
pF
mA
mA
%
Ω
kΩ
µA
mV
mV
µA
µA
µA
µA
A
kHz
Ω
Units
Conditions
I
SIG
= 5.0mA
I
SIG
= 200mA
I
SIG
= 5.0mA
I
SIG
= 200mA
I
SIG
= 5.0mA
I
SIG
= 200mA
V
PP
= +40V
V
NN
= -160V
V
PP
= +100V
V
NN
= -100V
V
PP
= +160V
V
NN
= -40V
I
SIG
= 5.0mA, V
PP
= +100V,
V
NN
= -100V
V
SIG
= V
PP
-10V, I
SIG
= 1.0A
Output Switch to RGND
I
RINT
= 0.5mA
V
SIG
= V
PP
-10V and V
NN
+10V
No Load
All switches OFF
All switches OFF
All switches ON, I
SW
= 5.0mA
All switches ON, I
SW
= 5.0mA
V
SIG
duty cycle < 0.1%
Duty cycle = 50%
V
PP
= +40V
V
NN
= -160V
V
PP
= +100V
V
NN
= -100V
V
PP
= +160V
V
NN
= -40V
V
PP
= +40V
V
NN
= -160V
V
PP
= +100V
V
NN
= -100V
V
PP
= +160V
V
NN
= -40V
All output
switches are
turning ON
and OFF at
50kHz with
no load.
All output
switches are
turning ON
and OFF at
50kHz with
no load.
f
CLK
= 5.0MHz, V
DD
= 5.0V
All logic inputs are static
V
OUT
= V
DD
- 0.7V
V
OUT
= 0.7V
---
* See Test Circuits on page 5
Doc.# DSFP-HV2701
E012412
3
Supertex inc.
www.supertex.com
HV2701
AC Electrical Characteristics
Sym
t
SD
t
WLE
t
DO
t
WCLR
t
SU
t
H
f
CLK
t
R
,t
F
T
ON
T
OFF
dv/dt
Parameter
Set up time before LE rises
Time width of LE
Clock delay time to data out
Time width of CLR
Set up time data to clock
Hold time data from clock
Clock frequency
Clock rise and fall times
Turn ON time*
Turn OFF time*
Maximum V
SIG
slew rate
Min
25
56
12
50
15
55
21
7.0
2.0
-
-
-
-
-
-
-
-
K
O
K
CR
I
ID
C
SG(OFF)
C
SG(ON)
+V
SPK
-V
SPK
+V
SPK
-V
SPK
+V
SPK
-V
SPK
Output voltage spike*
OFF isolation*
Switch crosstalk*
Output switch isolation
diode current
OFF capacitance SW to GND
ON capacitance SW to GND
-30
-58
-60
-
5.0
25
-
-
-
-
QC
Charge injection*
-
-
* See Test Circuits on page 5
(over recommended operating conditions, V
DD
= 5.0V, t
R
= t
F
≤ 5.0ns, 50% duty cycle, C
LOAD
= 20pF, unless otherwise noted)
0°C
Max
-
-
-
100
40
-
-
-
-
8.0
20
50
5.0
5.0
20
20
20
-
-
-
300
17
50
-
-
-
-
-
-
Min
25
-
-
50
15
55
-
-
2.0
-
-
-
-
-
-
-
-
-30
-58
-60
-
5.0
25
-
-
-
-
-
-
+25°C
Typ
-
56
12
78
30
-
21
7.0
-
-
-
-
-
-
-
-
-
-33
-
-70
-
12
38
-
-
-
820
600
350
Max
-
-
-
100
40
-
-
-
-
8.0
20
50
5.0
5.0
20
20
20
-
-
-
300
17
50
150
150
150
-
-
-
+70°C
Min
25
56
12
50
15
55
21
7.0
2.0
-
-
-
-
-
-
-
-
-30
-58
-60
-
5.0
25
-
-
-
-
-
-
Max
-
-
-
100
40
-
-
-
-
8.0
20
50
5.0
5.0
20
20
20
-
-
-
300
17
50
-
-
-
-
-
-
pC
mV
dB
dB
mA
pF
pF
v/ns
MHz
ns
µs
µs
Units
ns
ns
ns
ns
ns
ns
Conditions
---
V
DD
= 3.0V
V
DD
= 5.0V
V
DD
= 3.0V
V
DD
= 5.0V
---
V
DD
= 3.0V
V
DD
= 5.0V
V
DD
= 3.0 or 5.0V
V
DD
= 3.0V
V
DD
= 5.0V
----
V
SIG
= V
PP
-10V, R
LOAD
= 10kΩ
V
SIG
= V
PP
-10V, R
LOAD
= 10kΩ
V
PP
= +40V, V
NN
= -160V
V
PP
= +100V, V
NN
= -100V
V
PP
= +160V, V
NN
= -40V
f = 5.0MHz, 1.0kΩ//15pF load
f = 5.0MHz, 50Ω load
f = 5.0MHz, 50Ω load
300ns pulse width,
2.0% duty cycle
0V, f = 1.0MHz
0V, f = 1.0MHz
V
PP
= +40V, V
NN
= -160V,
R
LOAD
= 50Ω
V
PP
= +100V, V
NN
= -100V,
R
LOAD
= 50Ω
V
PP
= +160V, V
NN
= -40V,
R
LOAD
= 50Ω
V
PP
= +40V, V
NN
= -160V,
V
SIG
= 0V
V
PP
= +100V, V
NN
= -100V,
V
SIG
= 0V
V
PP
= +160V, V
NN
= -40V,
V
SIG
= 0V
Doc.# DSFP-HV2701
E012412
4
Supertex inc.
www.supertex.com
HV2701
HV2701 Test Circuits
V
PP
-10V
I
SOL
V
PP
-10V
V
OUT
R
LOAD
V
OUT
10k
Open
Open
RGND
RGND
VDD
GND
V
PP
V
NN
VPP
VNN
VDD
GND
5V
RGND
V
PP
V
NN
VPP
VNN
VDD
GND
5V
V
PP
V
NN
VPP
VNN
5V
Switch Off Leakage
per Switch
V
IN
= 10V
P-P
@5MHz
V
SIG
V
OUT
R
LOAD
I
ID
DC Offset Switch
ON/OFF
T
ON
/T
OFF
Test Circuit
V
IN
= 10V
P-P
@5MHz
V
NN
50
NC
50
RGND
RGND
V
PP
V
NN
VPP
VNN
VDD
GND
V
OUT
V
IN
5V
V
PP
V
NN
VPP
VNN
VDD
GND
5V
V
PP
V
NN
RGND
VPP
VNN
VDD
GND
V
OUT
V
IN
5V
K
O
= 20Log
K
CR
= 20Log
OFF Isolation
Output Switch
Isolation Diode Current
+V
SPK
V
OUT
50
Switch Crosstalk
V
OUT
V
OUT
1000pF
–V
SPK
R
LOAD
V
SIG
RGND
V
PP
V
NN
VPP
VNN
VDD
GND
5V
1k
V
PP
V
NN
VPP
VNN
RGND
VDD
GND
5V
Q = 1000pF x V
OUT
Charge Injection
Output Voltage Spike
Doc.# DSFP-HV2701
E012412
5
Supertex inc.
www.supertex.com
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
