LOW SKEW, 1-TO-4, CRYSTAL-TO-
LVCMOS/LVTTL FANOUT BUFFER
ICS83904I-02
G
ENERAL
D
ESCRIPTION
The ICS83904I-02 is a low skew, high perfor-
mance 1-to-4 Crystal Oscillator/Crystal-to-LVCMOS
HiPerClockS™
Fanout Buffer and a member of the HiPerClockS
™
family of High Performance Clock Solutions from IDT.
The ICS83904I-02 has selectable single-ended clock
or two crystal-oscillator inputs. There is an output enable to
disable the outputs by placing them into a high-impedance state.
F
EATURES
•
Four LVCMOS/LVTTL outputs,
19Ω typical output impedance
@ V
DD
= V
DDO
= 3.3V
•
Two Crystal oscillator input pairs
One LVCMOS/LVTTL clock input
•
Crystal input frequencry range: 12MHz – 38.88MHz
•
Output frequency: 200MHz (maximum)
•
Output Skew: 40ps (maximum)
@ V
DD
= V
DDO
= 3.3V
• RMS phase jitter @ 25MHz output, using a 25MHz crystal
(100Hz – 1MHz): 0.16ps (typical) @ V
DD
= V
DDO
= 3.3V
• RMS phase noise at 25MHz:
Offset
Noise Power
100Hz ............. -118.4 dBc/Hz
1kHz ............. -141.5 dBc/Hz
10kHz ............. -157.2 dBc/Hz
100kHz ............. -157.2 dBc/Hz
•
Supply Voltage Modes:
(Core/Output)
3.3V/3.3V
3.3V/2.5V
3.3V/1.8V
2.5V/2.5V
2.5V/1.8V
IC
S
Guaranteed output and par t-to-par t skew characteristics
make the ICS83904I-02 ideal for those applications demand-
ing well defined performance and repeatability.
B
LOCK
D
IAGRAM
OE
CLK_SEL0
Pullup
Pulldown
•
-40°C to 85°C ambient operating temperature
•
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
CLK_SEL1 Pulldown
XTAL_IN0
P
IN
A
SSIGNMENT
OSC
0 0
Q0
CLK_SEL0
XTAL_OUT0
XTAL_IN0
V
DD
XTAL_IN1
XTAL_OUT1
CLK_SEL1
CLK
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DDO
Q0
Q1
GND
Q2
Q3
V
DDO
OE
XTAL_OUT0
Q1
XTAL_IN1
OSC
0 1
Q2
XTAL_OUT1
ICS83904I-02
16-Lead TSSOP
4.4mm x 5.0mm x 0.92mm
package body
G Package
Top View
CLK
Pulldown
1 0
1 1
Q3
IDT
™
/ ICS
™
LVCMOS/LVTTL FANOUT BUFFER
1
ICS83904AGI-02 REV. A AUGUST 21, 2007
ICS83904I-02
LOW SKEW, 1-TO-4, CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1, 7
2, 3
4
5, 6
8
9
10, 16
11, 12, 14, 15
13
Name
CLK_SEL0,
CLK_SEL1
XTAL_OUT0,
XTAL_IN0
V
DD
XTAL_IN1,
XTAL_OUT1
CLK
OE
V
DDO
Q3, Q2, Q1, Q0
GN D
Type
Input
Input
Power
Input
Input
Input
Power
Output
Power
Description
Clock select inputs. See Table 3, Input Reference Function Table.
Pulldown
LVCMOS / LVTTL interface levels.
Cr ystal oscillator interface. XTAL_IN0 is the input.
XTAL_OUT0 is the output.
Core supply pin.
Cr ystal oscillator interface. XTAL_IN1 is the input.
XTAL_OUT1 is the output.
Pulldown Single-ended clock input. LVCMOS/LVTTL interface levels.
Output enable. When LOW, outputs are in HIGH impedance state.
Pullup
When HIGH, outputs are active. LVCMOS / LVTTL interface levels.
Output supply pins.
Single-ended clock outputs. LVCMOS/LVTTL interface levels.
Power supply ground.
NOTE:
Pullup
and
Pulldown
refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLUP
R
PULLDOWN
C
PD
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Power Dissipation Capacitance
(per output)
V
DDO
= 3.465V
V
DDO
= 2.625V
V
DDO
= 2.0V
V
DDO
= 3.3V
R
OUT
Output Impedance
V
DDO
= 2.5V
V
DDO
= 1.8V
Test Conditions
Minimum
Typical
4
51
51
8
7
7
19
21
32
Maximum
Units
pF
kΩ
kΩ
pF
pF
pF
Ω
Ω
Ω
T
ABLE
3. I
NPUT
R
EFERENCE
F
UNCTION
T
ABLE
Control Inputs
CLK_SEL1
CLK_SEL0
0
0
0
1
1
1
0
1
Reference
XTAL0 (default)
XTAL1
CLK
CLK
IDT
™
/ ICS
™
LVCMOS/LVTTL FANOUT BUFFER
2
ICS83904AGI-02 REV. A AUGUST 21, 2007
ICS83904I-02
LOW SKEW, 1-TO-4, CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
DD
Inputs, V
I
Outputs, V
O
Storage Temperature, T
STG
4.6V
-0.5V to V
DD
+ 0.5 V
-0.5V to V
DDO
+ 0.5V
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional op-
eration of product at these conditions or any conditions beyond
those listed in the
DC Characteristics
or
AC Characteristics
is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
Package Thermal Impedance,
θ
JA
100.3°C/W (0 mps)
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= V
DDO
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Core Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
No Load & XTALx selected @ 12MHz
No Load & CLK selected
No Load & CLK selected
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
Maximum
3.465
3.465
7
1
1
Units
V
V
mA
mA
mA
T
ABLE
4B. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= 3.3V±5%, V
DDO
= 2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Core Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
No Load & XTALx selected @ 12MHz
No Load & CLK selected
No Load & CLK selected
Test Conditions
Minimum
3.135
2.375
Typical
3.3
2.5
Maximum
3.465
2.625
7
1
1
Units
V
V
mA
mA
mA
T
ABLE
4C. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= 3.3V±5%, V
DDO
= 1.8V±0.2V, T
A
= -40°C
TO
85°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Core Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
No Load & XTALx selected @ 12MHz
No Load & CLK selected
No Load & CLK selected
Test Conditions
Minimum
3.135
1.6
Typical
3.3
1.8
Maximum
3.465
2.0
7
1
1
Units
V
V
mA
mA
mA
T
ABLE
4D. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= V
DDO
= 2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Core Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
No Load & XTALx selected @ 12MHz
No Load & CLK selected
No Load & CLK selected
Test Conditions
Minimum
2.375
2.375
Typical
2.5
2.5
Maximum
2.625
2.625
3
1
1
Units
V
V
mA
mA
mA
IDT
™
/ ICS
™
LVCMOS/LVTTL FANOUT BUFFER
3
ICS83904AGI-02 REV. A AUGUST 21, 2007
ICS83904I-02
LOW SKEW, 1-TO-4, CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
T
ABLE
4E. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
DD
= 2.5V±5%, V
DDO
= 1.8V±0.2V, T
A
= -40°C
TO
85°C
Symbol
V
DD
V
DDO
I
DD
I
DDO
Parameter
Core Supply Voltage
Output Supply Voltage
Power Supply Current
Output Supply Current
No Load & XTALx selected @ 12MHz
No Load & CLK selected
No Load & CLK selected
Test Conditions
Minimum
2.375
1.6
Typical
2.5
1.8
Maximum
2.625
2.0
3
1
1
Units
V
V
mA
mA
mA
T
ABLE
4F. DC C
HARACTERISTICS
,
T
A
= -40°C
TO
85°C
Symbol
V
IH
V
IL
I
IH
Parameter
Input High Voltage
Input Low Voltage
CLK,
CLK_SEL0:1
OE
CLK,
CLK_SEL0:1
OE
Test Conditions
V
DD
= 3.3V ± 5%
V
DD
= 2.5V ± 5%
V
DD
= 3.3V ± 5%
V
DD
= 2.5V ± 5%
V
DD
= 3.3V or 2.5V ± 5%
V
DD
= 3.3V or 2.5V ± 5%
V
DD
= 3.3V or 2.5V ± 5%
V
DD
= 3.3V or 2.5V ± 5%
V
DDO
= 3.3V ± 5%; NOTE 1
V
OH
Output HighVoltage
V
DDO
= 2.5V ± 5%; NOTE 1
V
DDO
= 1.8V ± 0.2V; NOTE 1
V
DDO
= 3.3V ± 5%; NOTE 1
V
OL
Output Low Voltage
V
DDO
= 2.5V ± 5%; NOTE 1
V
DDO
= 1.8V ± 0.2V; NOTE 1
-5
-150
2.6
1.8
1.2
0.6
0.5
0. 4
Minimum
2.2
1.6
-0.3
-0.3
Typical
Maximum
V
DD
+ 0.3
V
DD
+ 0.3
1.3
0.9
150
5
Units
V
V
V
V
µA
µA
µA
µA
V
V
V
V
V
V
Input High Current
I
IL
Input Low Current
NOTE 1: Outputs terminated with 50
Ω
to V
DDO
/2. See Parameter Measurement section, "Load Test Circuit" diagrams.
T
ABLE
5. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
12
Test Conditions
Minimum
Typical Maximum
38.88
50
7
1
Units
MH z
Ω
pF
mW
Fundamental
IDT
™
/ ICS
™
LVCMOS/LVTTL FANOUT BUFFER
4
ICS83904AGI-02 REV. A AUGUST 21, 2007
ICS83904I-02
LOW SKEW, 1-TO-4, CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
T
ABLE
6A. AC C
HARACTERISTICS
,
V
DD
= V
DDO
= 3.3V ± 5%, T
A
= -40°C
TO
85°C
Symbol Parameter
f
MAX
tp
LH
t
sk(o)
t
sk(pp)
t
jit(Ø)
t
R
/ t
F
odc
t
EN
w/external CLK
Propagation Delay, Low-to-High;
NOTE 1
Output Skew; NOTE 2
Par t-to-Par t Skew; NOTE 2, 3
RMS Phase Jitter, Random;
NOTE 2, 4
Output Rise/Fall Time
Output
Duty Cycle
w/external XTAL
w/external CLK
ƒ < 150MHz
25MHz, Integration Range:
100Hz – 1MHz
20% to 80%
Output Frequency
w/external XTAL
Test Conditions
Minimum
12
Typical
Maximum
38.88
200
1.4
1.9
2. 4
40
700
0.16
100
45
46
800
55
54
10
10
Units
MHz
MHz
ns
ps
ps
ps
ps
%
%
ns
ns
Output Enable Time; NOTE 5
Output Disable Time; NOTE 5
t
DIS
NOTE 1: Measured from V
DD
/2 of the input to V
DDO
/2 of the output.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and
with equal load conditions. Using the same type of input on each device, the output is measured at V
DDO
/2.
NOTE 4: Phase jitter is dependent on the input source used.
NOTE 5: These parameters are guaranteed by characterization. Not tested in production.
T
ABLE
6B. AC C
HARACTERISTICS
,
V
DD
= 3.3V ± 5%, V
DDO
= 2.5V ± 5%, T
A
= -40°C
TO
85°C
Symbol Parameter
f
MAX
tp
LH
t
sk(o)
t
sk(pp)
t
jit(Ø)
t
R
/ t
F
odc
t
EN
w/external CLK
Propagation Delay, Low-to-High;
NOTE 1
Output Skew; NOTE 2
Par t-to-Par t Skew; NOTE 2, 3
RMS Phase Jitter, Random;
NOTE 2, 4
Output Rise/Fall Time
Output
Duty Cycle
w/external XTAL
w/external CLK
ƒ < 150MHz
25MHz, Integration Range:
100Hz - 1MHz
20% to 80%
Output Frequency
w/external XTAL
Test Conditions
Minimum
12
Typical
Maximum
38.88
200
1.5
2. 0
2.5
40
700
0.16
100
45
46
800
55
54
10
10
Units
MHz
MHz
ns
ps
ps
ps
ps
%
%
ns
ns
Output Enable Time; NOTE 5
Output Disable Time; NOTE 5
t
DIS
NOTE 1: Measured from V
DD
/2 of the input to V
DDO
/2 of the output.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Defined as skew between outputs on different devices operating a the same supply voltages and
with equal load conditions. Using the same type of input on each device, the output is measured at V
DDO
/2.
NOTE 4: Phase jitter is dependent on the input source used.
NOTE 5: These parameters are guaranteed by characterization. Not tested in production.
IDT
™
/ ICS
™
LVCMOS/LVTTL FANOUT BUFFER
5
ICS83904AGI-02 REV. A AUGUST 21, 2007
模拟与混合信号
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