ESIGNS
NEW D
ED FOR MENT PART
MMEND
CO
LACE
N OT R E
ED REP A
ME N D
4
R E C OM
ISL2904
Low Power Ambient Light and Proximity Sensor with
Internal IR-LED and Digital Output
ISL29043
The ISL29043 is an integrated ambient and infrared
light-to-digital converter with a built-in IR LED and I
2
C Interface
(SMBus Compatible). This device uses two independent ADCs
for concurrently measuring ambient light and proximity in
parallel. The flexible interrupt scheme is designed for minimal
microcontroller utilization.
For ambient light sensor (ALS) data conversions, an ADC
converts photodiode current (with a light sensitivity range up to
2000 Lux) in 100ms per sample. The ADC rejects 50Hz/60Hz
flicker noise caused by artificial light sources.
For proximity sensor (Prox) data conversions, the built-in driver
turns on an internal infrared LED and the proximity sensor ADC
converts the reflected IR intensity to digital. This ADC rejects
ambient IR noise (such as sunlight) and has a 540μs
conversion time.
The ISL29043 provides low power operation of ALS and
proximity sensing with a typical 136μA normal operation
current (110μA for sensors and internal circuitry, ~28μA for
LED) with 220mA current pulses for a net 100μs, repeating
every 800ms (or under).
The ISL29043 uses both a hardware pin and software bits to
indicate an interrupt event has occurred. An ALS interrupt is
defined as a measurement that is outside a set window. A
proximity interrupt is defined as a measurement over a
threshold limit. The user may also require that both ALS/Prox
interrupts occur at once, up to 16 times in a row before
activating the interrupt pin.
The ISL29043 is designed to operate from 2.25V to 3.63V over
the -40°C to +85°C ambient temperature range. It is packaged in
a clear, lead-free 10 Ld ODFN package.
Features
• Internal LED + Sensor = Complete Solution
• Works Under All Light Sources Including Sunlight
• Dual ADCs Measure ALS/Prox Concurrently
• <1.0μA Supply Current When Powered Down
• Temperature Compensated
• Pb-Free (RoHS compliant)
Intelligent and Flexible Interrupts
• Independent ALS/Prox Interrupt Thresholds
• Adjustable Interrupt Persistency
- 1/4/8/16 Consecutive Triggers Required Before Interrupt
Applications
• Display and Keypad Dimming Adjustment and Proximity
Sensing for:
- Mobile Devices: Smart Phone, PDA, GPS
- Computing Devices: Laptop PC, Netbook, Tablet PC
- Consumer Devices: LCD-TV, Digital Picture Frame, Digital
Camera
- Industrial and Medical Light and Proximity Sensing
Related Literature
• See
AN1436,
“Proximity Sensors”
255
V
I2C
PULL-UP
I
2
C MASTER
µCONTROLLER
INT
SDA
SCL
SLAVE_1
SDA
SCL
I
2
C SLAVE_n
SDA
SCL
PROX COUNTS (8-BIT)
R1
10kΩ
V
DD
V
LED
R2
10kΩ
R3
10kΩ
204
110mA (18% GREY CARD)
153
220mA (18% GREY CARD)
110mA (WHITE COPY PAPER)
220mA (WHITE COPY PAPER)
51
0
C2
1µF
C1
1.0µF 2
ADDR0 IRDR
3
V
INT
DD
C3
4
GND SDA
0.1µF
5
REXT
SCL
ISL29043
R
EXT
499kΩ
SLAVE_0
1
LED+ LED-
10
9
8
7
6
102
0
25
50
75
100
125
150
DISTANCE (mm)
FIGURE 1. TYPICAL APPLICATION DIAGRAM
FIGURE 2. PROXIMITY RESPONSE vs DISTANCE
April 28, 2016
FN7935.2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Copyright Intersil Americas LLC. 2012, 2016. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL29043
ISL29043 Block Diagram
VDD
3
ALS PHOTODIODE
ARRAY
COMMAND
REGISTER
LIGHT DATA
PROCESS
ALS AND IR
IR PHOTODIODE
ARRAY
IREF
FOSC
INTERRUPT
DUAL CHANNEL
ADCs
DATA
REGISTER
2
I
2
C
6
7
8
ADDR0
SCL
SDA
INT
IR DRIVER
5
REXT
4
GND
1
LED+
10
LED-
9
IRDR
Pin Configuration
ISL29043
(10 LD 2.1x3.5 (mm) OPTICAL CO-PACKAGE)
TOP VIEW
Pin Descriptions
PIN # PIN NAME
0
1
T-PAD
LED+
ADDR0
VDD
GND
REXT
SCL
SDA
INT
IRDR
LED-
DESCRIPTION
Thermal pad. Floating - do not connect to GND or VDD
Anode of IR-LED
I
2
C address pin - pull high or low (do not float)
Positive supply: 2.25V to 3.63V
Ground
External resistor (499k; 1%) connects this pin to
ground.
I
2
C clock line
I
2
C data line
The I
2
C bus lines can be pulled from
1.7V to above V
DD
, 3.63V max.
LED+
ADDR0
VDD
GND
REXT
1
2
3
4
5
10
9
8
7
6
LED-
IR D R
IN T
SDA
2
3
4
5
6
SCL
7
8
9
10
*T H E R M A L P A D M U S T B E L E F T
F L O A T IN G
Interrupt pin; Logic output (open-drain) for interrupt
IR-LED driver pin - current flows into ISL29043 from
LED cathode
Cathode of IR-LED
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL29043IROMZ-T7
ISL29043IROMZ-EVALZ
NOTES:
1. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets: molding compounds, die attach materials, NiPdAu plate (e4
termination finish), which are all RoHS compliant. The ISL29043 is compatible with limited SnPb and Pb-free soldering operations. The ISL29043 is
MSL classified. See Tech Brief
TB489
(Surface
Mount Guidelines for Optical Co-packages)
for reflow profile and more information.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL29043.
For more information on MSL please see tech brief
TB477.
TEMP. RANGE
(°C)
-40 to +85
Evaluation Board
PACKAGE
Tape & Reel
(Pb-free)
10 Ld Optical Co-package
PKG.
DWG. #
L10.2.1x3.5E
2
FN7935.2
April 28, 2016
ISL29043
Absolute Maximum Ratings
(T
A
= +25°C)
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
10 Ld Optical Module Package (Notes 4, 5)
113
58
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +90°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see
TB489
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
V
DD
Supply Voltage between V
DD
and GND . . . . . . . . . . . . . . . . . . . . . .4.0V
I
2
C Bus Pin Voltage (SCL, SDA). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 4.0V
I
2
C Bus Pin Current (SCL, SDA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <10mA
R
EXT
Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to VDD + 0.5V
IRDR Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5V
ADDR0 Pin Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to VDD + 0.5V
INT Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 4.0V
INT Pin Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <10mA
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (Note 6) 2kV
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379
for details.
5. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
6. ESD is rated at 2kV HBM on all pins except IRDR, which is rated at 1kV.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise
noted, all tests are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
Electrical Specifications
PARAMETER
V
DD
SR_V
DD
I
DD_OFF
I
DD_NORM
I
DD_PRX_SLP
I
DD_ALS
f
OSC
t
INTGR_ALS
t
INTGR_PROX
DATA
ALS_0
DATA
ALS_F
ΔDATA
DATA
DATA
ALS_1
DATA
ALS_2
DATA
PROX_0
DATA
PROX_F
t
r
t
f
I
IRDR_0
I
IRDR_1
I
IRDR_LEAK
V
IRDR
VDD = 3.0V, TA = +25°C, REXT = 499kΩ 1% tolerance.
CONDITION
MIN
MAX
(Note 7) TYP (Note 7) UNIT
2.25
V
DD
Rising Edge between 0.4V and 2.25V
ALS_EN = 0; PROX_EN = 0
ALS_EN = 1; PROX_EN = 1
ALS_EN = 0; PROX_EN = 1
ALS_EN = 1; PROX_EN = 0
0.5
0.1
110
80
96
5.25
88
100
0.54
E
AMBIENT
= 0 lux, 2k Range
E
AMBIENT
> Selected Range Maximum Lux
(Note 10)
±10
1638
460
614
1
768
3
255
R
LOAD
= 15 at IRDR pin, 20% to 80%
R
LOAD
= 15 at IRDR pin, 80% to 20%
PROX_DR = 0; V
IRDR
= 0.5V
PROX_DR = 1; V
IRDR
= 0.5V
PROX_EN = 0; V
DD
= 3.63V (Note 9)
Register bit PROX_DR = 0
0.5
90
500
500
110
220
0.001
1
4.3
130
1
3
112
0.8
125
3.0
3.63
V
V/ms
µA
µA
µA
µA
MHz
ms
ms
Counts
DESCRIPTION
Power Supply Range
Input Power-up Slew Rate
Supply Current when Powered Down
Supply Current for ALS+Prox in Sleep Time
Supply Current for Prox in Sleep Time
Supply Current for ALS
Internal Oscillator Frequency
12-bit ALS Integration/Conversion Time
8-bit Prox Integration/Conversion Time
ALS Result when Dark
Full Scale ALS ADC Code
4095 Counts
%
Counts
Counts
Counts
Counts
ns
ns
mA
mA
µA
V
Count Output Variation Over Three Light Sources: Ambient Light Sensing
Fluorescent, Incandescent and Sunlight
Light Count Output with LSB of 0.029 lux/count
Light Count Output With LSB of 0.469 lux/count
Prox Measurement
Full Scale Prox ADC Code
Rise Time for IRDR Sink Current
Fall time for IRDR Sink Current
IRDR Sink Current
IRDR Sink Current
IRDR Leakage Current
Acceptable Voltage Range on IRDR Pin
E = 47 lux, Green LED (Note 10), ALS_RANGE = 0
E = 288 lux, Green LED, ALS_RANGE = 1
IR LED off (Note 8)
3
FN7935.2
April 28, 2016
ISL29043
Electrical Specifications
PARAMETER
t
PULSE
V
REF
F
I2C
V
I2C
V
IL
V
IH
I
SDA
I
INT
PSRR
IRDR
NOTES:
7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
8. An 850nm infrared LED is used to test PROX/IR sensitivity in an internal test mode.
9. Ability to guarantee I
IRDR
leakage of ~1nA is limited by test hardware.
10. For ALS applications under light-distorting glass, please see the section titled “ALS Range 1 Considerations” on page 10.
VDD = 3.0V, TA = +25°C, REXT = 499kΩ 1% tolerance. (Continued)
CONDITION
MIN
MAX
(Note 7) TYP (Note 7) UNIT
100
0.52
400
1.7
3.63
0.55
1.25
V
OL
= 0.4V
V
OL
= 0.4V
PROX_DR = 0; V
IRDR
= 0.5V to 4.3V
3
3
5
5
3
µs
V
kHz
V
V
V
mA
mA
mA/V
DESCRIPTION
Net I
IRDR
On Time Per PROX Reading
Voltage of R
EXT
Pin
I
2
C Clock Rate Range
Supply Voltage Range for I
2
C Interface
SCL and SDA Input Low Voltage
SCL and SDA Input High Voltage
SDA Current Sinking Capability
INT Current Sinking Capability
(I
IRDR
)/(V
IRDR
)
IR-LED Specifications
PARAMETER
V
F
TA = +25°C
DESCRIPTION
CONDITION
I
F
= 100mA
I
F
= 200mA
MIN
(Note 7)
TYP
1.6
1.8
5
855
30
27
10
MAX
(Note 7)
UNIT
V
V
µA
nm
nm
mW
mW/sr
IR-LED Forward Voltage Drop
I
R
λ
P
Δ
λ
Φ
E
I
IR-LED Reverse-Bias Current
IR-LED Peak Output Wavelength
IR-LED Spectral Half-Width
IR-LED Radiant Power
IR-LED Radiant Intensity (in 0.01sr)
V
R
= 5.5V
I
F
= 100mA
I
F
= 100mA
I
F
= 100mA
I
F
= 100mA
I
2
C Electrical Specifications
(Note 11).
PARAMETER
V
I2C
f
SCL
V
IL
V
IH
V
hys
V
OL
I
i
t
SP
t
AA
C
i
For SCL and SDA unless otherwise noted, VDD = 3V, TA = +25°C, REXT = 499kΩ 1% tolerance
MIN
(Note 7)
1.7
MAX
TYP (Note 7) UNIT
3.63
400
0.55
1.25
0.05V
DD
0.4
-10
10
50
900
10
V
kHz
V
V
V
V
µA
ns
ns
pF
DESCRIPTION
Supply Voltage Range for I
2
C Interface
SCL Clock Frequency
SCL and SDA Input Low Voltage
SCL and SDA Input High Voltage
Hysteresis of Schmitt Trigger Input
Low-level Output Voltage (Open-drain) at 4mA Sink
Current
Input Leakage for each SDA, SCL Pin
Pulse Width of Spikes that must be Suppressed by
the Input Filter
SCL Falling Edge to SDA Output Data Valid
Capacitance for each SDA and SCL Pin
CONDITION
4
FN7935.2
April 28, 2016
ISL29043
I
2
C Electrical Specifications
(Note 11). (Continued)
PARAMETER
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
t
SU:STO
t
BUF
C
b
R
pull-up
t
VD;DAT
t
VD:ACK
V
nL
V
nH
NOTES:
11. All parameters in I
2
C Electrical Specifications table are guaranteed by design and simulation.
12. C
b
is the capacitance of the bus in pF.
For SCL and SDA unless otherwise noted, VDD = 3V, TA = +25°C, REXT = 499kΩ 1% tolerance
MIN
(Note 7)
600
1300
600
600
30
100
(Note 12)
(Note 12)
20 + 0.1xC
b
20 + 0.1xC
b
600
1300
400
Maximum is determined by t
R
and t
F
1
0.9
0.9
0.1VDD
0.2VDD
MAX
TYP (Note 7) UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
k
µs
µs
V
V
DESCRIPTION
Hold Time (Repeated) START Condition
LOW Period of the SCL Clock
HIGH period of the SCL Clock
Set-up Time for a Repeated START Condition
Data Hold Time
Data Set-up Time
Rise Time of both SDA and SCL Signals
Fall Time of both SDA and SCL Signals
Set-up Time for STOP Condition
Bus Free Time Between a STOP and START Condition
Capacitive Load for Each Bus Line
SDA and SCL System Bus Pull-up Resistor
Data Valid Time
Data Valid Acknowledge Time
Noise Margin at the Low Level
Noise Margin at the High Level
CONDITION
After this period, the first clock pulse is
generated.
Measured at the 30% of VDD crossing.
FIGURE 3. I
2
C TIMING DIAGRAM
5
FN7935.2
April 28, 2016
FPGA/CPLD
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