Operating Temperature Range .......................... -40NC to +85NC
Junction Temperature .....................................................+150NC
Storage Temperature Range............................ -65NC to +160NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
IN
= +3.7V, Circuit of Figure 2, V
OUTP
= +4.9V, V
OUTN
= -4.9V,
T
A
= 0°C to +85°C,
unless otherwise noted. Typical values are at
T
A
= +25NC.) (Note 1)
PARAMETER
IN Input Supply Range
IN Undervoltage-Lockout
Threshold
IN Quiescent Current
OUTP Quiescent Current
V
IN
Quiescent Current
IN Shutdown Current
STEP-UP REGULATOR
OUTP Regulation Voltage
OUTP Fault Trip Level
OUTP Load Regulation
Oscillator Frequency
Maximum Load Current
LXP/OUTP Peak Current Limit
LXP nMOS N1 On-Resistance
LXP pMOS1 P1 On-Resistance
LXP pMOS2 P2 On-Resistance
LXP Damping Switch
On-Resistance
OUTP Discharge Resistance
Soft-Start Period
INVERTING REGULATOR
OUTN Default Regulation
Voltage
OUTN Minimum Regulation
Voltage
At startup: I
LOAD
10mA to 200mA; V
IN
= 2.3V to 4.2V
Lowest DAC code: I
LOAD
10mA to 200mA;
V
IN
= 2.3V to 4.2V
-4.949
-5.454
-4.9
-5.4
-4.851
-5.346
V
V
OUTP to PGND
7-bit voltage ramp with filtering to prevent high peak
currents
V
IN
= 2.9V to 4.2V (Note 2)
Duty cycle = 35%
I
LXP1
= 200mA, Figure 3
I
LXP1
= 200mA, Figure 3
I
LXP2
= 200mA, Figure 3
I
LOAD
= 10mA to 200mA,
V
IN
= 2.3V to 4.2V
Falling edge, no hysteresis
Falling edge, no hysteresis, no timer
0 < I
LOAD
< 200mA, DC regulation
1190
250
850
1100
0.2
0.15
0.15
20
330
2
1350
0.4
0.3
0.3
4.554
3.496
2.116
4.60
3.68
2.3
0.1
1400
1610
4.646
3.864
2.484
V
V
%
kHz
mA
mA
I
I
I
I
I
ms
V
IN
rising, hysteresis = 200mV
EN = IN, no load, not switching
EN = IN, no load, not switching
EN = IN, no load
EN = AGND, T
A
= +25NC
CONDITIONS
MIN
2.3
1.8
2.0
50
0.8
1.6
TYP
MAX
4.2
2.2
90
1.1
2.5
1
UNITS
V
V
FA
mA
mA
FA
2
Dual-Output DC/DC
Power Supply for AMOLED
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= +3.7V, Circuit of Figure 2, V
OUTP
= +4.9V, V
OUTN
= -4.9V,
T
A
= 0°C to +85°C,
unless otherwise noted. Typical values are at
T
A
= +25NC.) (Note 1)
PARAMETER
OUTN Maximum Regulation
Voltage
CONDITIONS
Highest DAC code: I
LOAD
10mA to 200mA;
V
IN
= 2.3V to 4.2V
Rising edge, no hysteresis,
relative to current DAC step
Rising edge, no hysteresis,
relative to current DAC step, no timer
V
IN
= 2.9V to 4.2V (Note 2)
Duty cycle = 65%
I
LXN
= 200mA
I
LXN
= 200mA
MIN
-1.530
73
43
1190
250
1000
1200
0.25
0.25
70
OUTN to PGND
7-bit voltage ramp with filtering to prevent high peak
currents
0.01
330
2
0.025
4
STEP = AGND
STEP Period
SEQUENCE CONTROL
EN Input Low Voltage
EN Input High Voltage
EN Input Resistance
FAULT DETECTION
Duration-to-Trigger Fault
Condition
Thermal-Shutdown Threshold
TIMING SPECIFICATIONS
Enable Start Delay
EN Pulse Stop Time
EN Turn-Off Delay
OUTN Initial Start Ramp Time
EN Pulse Frequency
t
EN_DLY
(Note 3)
t
STOP
(Note 3)
t
OFF_DLY
(Note 3)
OUTN transition
from -4.9V to -1.5V (Note 4)
50% duty factor
12
250
50
300
300
60
2
50
250
70
400
Fs
Fs
Fs
ms
kHz
OUTP or OUTN below threshold
Latched fault
50
+160
ms
NC
To AGND
1.2
140
0.6
V
V
kI
R
STEP
= 50kI
R
STEP
= 150kI
3.5
1.5
5
4
2
6
4.5
2.5
7
ms
0.04
V
1400
0.50
0.50
TYP
-1.5
80
50
1400
MAX
-1.470
87
%
57
1610
kHz
mA
mA
I
I
I
I
ms
UNITS
V
MAX17116
OUTN Fault Trip Level
Oscillator Frequency
Maximum Load Current
OUTN/LXN Peak Current Limit
LXN-to-IN pMOS On-Resistance
LXN-to-OUTN nMOS
On-Resistance
LXN Damping Switch
On-Resistance
OUTN Discharge Resistance
Soft-Start Period
DAC Step Voltage
Number of DAC Steps Between
Levels
3
Dual-Output DC/DC
Power Supply for AMOLED
MAX17116
ELECTRICAL CHARACTERISTICS
(V
IN
= +3.7V, Circuit of Figure 2, V
OUTP
= +4.9V, V
OUTN
= -4.9V,
T
A
= -40°C to +85°C,
unless otherwise noted. Typical values are
at T
A
= +25NC.) (Note 1)
PARAMETER
IN Input Supply Range
IN Undervoltage-Lockout
Threshold
IN Quiescent Current
OUTP Quiescent Current
STEP-UP REGULATOR
OUTP Regulation Voltage
OUTP Fault Trip Level
Oscillator Frequency
LXP/OUTP Peak Current Limit
LXP nMOS N1 On-Resistance
LXP pMOS1 P1 On-Resistance
LXP pMOS2 P2 On-Resistance
INVERTING REGULATOR
OUTN Default Regulation
Voltage
OUTN Minimum Regulation
Voltage
OUTN Maximum Regulation
Voltage
OUTN Fault Trip Level
Oscillator Frequency
OUTN/LXN Peak Current Limit
LXN to IN pMOS On-Resistance
LXN to OUTN nMOS
On-Resistance
DAC Step Voltage
STEP = AGND
STEP Period
SEQUENCE CONTROL
EN Input Low Voltage
EN Input High Voltage
1.2
0.6
V
V
R
STEP
= 50kI
R
STEP
= 150kI
Duty cycle = 65%
I
LXN
= 200mA
I
LXN
= 200mA
0.01
3.5
1.5
5
At startup: I
LOAD
10mA to 200mA;
V
IN
= 2.3V to 4.2V
Lowest DAC code: I
LOAD
10mA to 200mA;
V
IN
= 2.3V to 4.2V
Highest DAC code: I
LOAD
10mA to 200mA;
V
IN
= 2.3V to 4.2V
Rising edge, no hysteresis,
relative to current DAC step
Rising edge, no hysteresis,
relative to current DAC step, no timer
-4.949
-5.454
-1.530
73
43
1190
1000
-4.851
-5.366
-1.470
87
%
57
1610
1400
0.50
0.50
0.04
4.5
2.5
7
ms
kHz
mA
I
I
V
V
V
V
Duty cycle = 35%
I
LXP1
= 200mA, Figure 3
I
LXP1
= 200mA, Figure 3
I
LXP2
= 200mA, Figure 3
I
LOAD
= 10mA to 200mA,
V
IN
= 2.3V to 4.2V
Falling edge, no hysteresis
Falling edge, no hysteresis, no timer
4.554
3.496
2.116
1190
800
4.646
3.864
2.484
1610
1400
0.4
0.3
0.3
V
V
kHz
mA
I
I
I
V
IN
rising, hysteresis = 200mV
EN = IN, no load
EN = IN, no load
CONDITIONS
MIN
2.3
1.8
TYP
MAX
4.2
2.2
90
2.5
1.1
UNITS
V
V
FA
mA
mA
4
Dual-Output DC/DC
Power Supply for AMOLED
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= +3.7V, Circuit of Figure 2, V
OUTP
= +4.9V, V
OUTN
= -4.9V,
T
A
= -40°C to +85°C,
unless otherwise noted. Typical values are
at T
A
= +25NC.) (Note 1)
PARAMETER
TIMING SPECIFICATIONS
Enable Start Delay
EN Pulse Stop Time
EN Turn-Off Delay
EN Pulse Frequency
t
EN_DLY
(Note 3)
t
STOP
(Note 3)
t
OFF_DLY
(Note 3)
50% duty factor
250
50
12
70
250
400
Fs
Fs
Fs
kHz
CONDITIONS
MIN
TYP
MAX
UNITS
MAX17116
Note 1:
Limits are 100% production tested at T
A
= +25NC. Maximum and minimum limits over temperature are guaranteed by design
and characterization.
Note 2:
Guaranteed by design, not production tested.
Note 3:
The timing definitions are illustrated in Figure 1.
Note 4:
The initial start ramp time depends on load conditions and is correct only when the discharge time due to load on the output
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