MAX4950CTO+
RELIABILITY REPORT
FOR
MAX4950CTO+
PLASTIC ENCAPSULATED DEVICES
May 20, 2009
MAXIM INTEGRATED PRODUCTS
120 SAN GABRIEL DR.
SUNNYVALE, CA 94086
Approved by
Ken Wendel
Quality Assurance
Director, Reliability Engineering
Maxim Integrated Products. All rights reserved.
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MAX4950CTO+
Conclusion
The MAX4950CTO+ successfully meets the quality and reliability standards required of all Maxim products. In addition, Maxim"s
continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim"s quality and reliability standards.
Table of Contents
I. ........Device Description
II. ........Manufacturing Information
III. .......Packaging Information
.....Attachments
I. Device Description
A. General
The MAX4950 PCI Express (PCIe®) quad equalizer/redriver operates from a single +3.3V supply. This device improves signal integrity at the receiver
through programmable input equalization and programmable redrive circuitry. The output circuitry reestablishes deemphasis lost on the board,
compensating for circuit board loss. This device permits optimal placement of key PCIe components and longer runs of stripline, microstrip, or cable.
The MAX4950 contains four identical buffers capable of equalizing differential signals at data rates up to 5GT/s, and features electrical idle and
receiver detection on each channel. The MAX4950 is ideal for use with PCIe Gen I (2.5GT/s) and Gen II (5.0GT/s) data rates and features a
power-saving mode. The MAX4950 is available in a small, lead-free, 42-pin (3.5mm x 9.0mm) TQFN package for optimal layout and minimal space
requirements. The board traces are flow-through for ease of layout. The MAX4950 is specified over the 0°C to +70°C operating temperature range.
V. ........Quality Assurance Information
VI. .......Reliability Evaluation
IV. .......Die Information
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MAX4950CTO+
II. Manufacturing Information
A. Description/Function:
B. Process:
C. Number of Device Transistors:
D. Fabrication Location:
E. Assembly Location:
F. Date of Initial Production:
III. Packaging Information
A. Package Type:
B. Lead Frame:
C. Lead Finish:
D. Die Attach:
E. Bondwire:
F. Mold Material:
G. Assembly Diagram:
H. Flammability Rating:
I. Classification of Moisture Sensitivity per
JEDEC standard J-STD-020-C
J. Single Layer Theta Ja:
K. Single Layer Theta Jc:
L. Multi Layer Theta Ja:
M. Multi Layer Theta Jc:
IV. Die Information
A. Dimensions:
B. Passivation:
C. Interconnect:
D. Backside Metallization:
E. Minimum Metal Width:
F. Minimum Metal Spacing:
G. Bondpad Dimensions:
H. Isolation Dielectric:
I. Die Separation Method:
69 X 270 mils
Si
3
N
4
Au
None
1.2 microns (as drawn) Metal 1, 2 & 3 5.6 microns (as drawn) Metal 4
1.6 microns (as drawn) Metal 1, 2 & 3, 4.2 microns (as drawn) Metal 4
5 mil. Sq.
SiO
2
Wafer Saw
42-pin TQFN 3.5x9
Copper
100% matte Tin
Conductive Epoxy
Au (1.0 mil dia.)
Epoxy with silica filler
#
Class UL94-V0
Level 1
40°C/W
2°C/W
29°C/W
2°C/W
Quad PCI Express Equalizer/Redriver
G4
12261
Oregon
UTL Thailand
December 5, 2008
Maxim Integrated Products. All rights reserved.
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MAX4950CTO+
V. Quality Assurance Information
A. Quality Assurance Contacts:
Ken Wendel (Director, Reliability Engineering)
Bryan Preeshl (Managing Director of QA)
0.1% for all electrical parameters guaranteed by the Datasheet.
0.1% For all Visual Defects.
< 50 ppm
Mil-Std-105D
B. Outgoing Inspection Level:
C. Observed Outgoing Defect Rate:
D. Sampling Plan:
VI. Reliability Evaluation
A. Accelerated Life Test
The results of the 135°C biased (static) life test are shown in Table 1. Using these results, the Failure Rate ( ) is calculated as
follows:
=
1
MTTF
=
1.83
192 x 4340 x 48 x 2
-9
(Chi square value for MTTF upper limit)
(where 4340 = Temperature Acceleration factor assuming an activation energy of 0.8eV)
= 22.4 x 10
= 22.4 F.I.T. (60% confidence level @ 25°C)
The following failure rate represents data collected from Maxim’s reliability monitor program. Maxim performs quarterly
1000 hour life test monitors on its processes. This data is published in the Product Reliability Report found at http://www.maxim-
ic.com/.
Current monitor data for the G4 Process results in a FIT Rate of 0.2 @ 25C and 3.6 @ 55C (0.8 eV, 60% UCL)
B. Moisture Resistance Tests
The industry standard 85°C/85%RH or HAST testing is monitored per device process once a quarter.
C. E.S.D. and Latch-Up Testing
The AJ42 die type has been found to have all pins able to withstand a HBM transient pulse of +/-2500 V per
JEDEC JESD22-A114. Latch-Up testing has shown that this device withstands a current of +/-250 mA, 1.5x VCCMax
Overvoltage per JESD78.
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MAX4950CTO+
Table 1
Reliability Evaluation Test Results
MAX4950CTO+
TEST ITEM
TEST CONDITION
FAILURE
IDENTIFICATION
SAMPLE SIZE
NUMBER OF
FAILURES
Static Life Test
(Note 1)
Ta = 135°C
Biased
Time = 192 hrs.
Moisture Testing
(Note 2)
85/85
Ta = 85°C
RH = 85%
Biased
Time = 1000hrs.
DC Parameters
& functionality
48
0
DC Parameters
& functionality
77
0
Mechanical Stress
(Note 2)
Temperature
-65°C/150°C
Cycle
1000 Cycles
Method 1010
DC Parameters
& functionality
77
0
Note 1: Life Test Data may represent plastic DIP qualification lots.
Note 2: Generic Package/Process data
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