MGA-43728
2.62–2.69 GHz Linear Power Amplifier Module
Data Sheet
Description
The Avago MGA-43728 is a fully matched, highly linear
power amplifier (PA) designed for use in the 2.62–2.69
GHz band. Based on Avago’s proprietary 0.25um GaAs E-
pHEMT technology, the device features high linearity, gain
and power-added efficiency (PAE) with integrated power
detector and shutdown functions. The MGA-43728 is ideal
for use as a final stage PA for Small Cell base transceiver
station (BTS) applications.
Features
•
High linearity performance : Typ -50 dBc ACPR1
[1]
at
27.0 dBm linear output power (biased with 5.0V supply)
•
High Gain : 38.8 dB
•
Good efficiency
•
Fully matched
•
Built-in detector
•
GaAs E-pHEMT Technology
[2]
•
Low cost small package size: (5.0
×
5.0
×
0.9) mm
Component Image
(5.0
×
5.0
×
0.9) mm Package Outline
Specifications
2.65 GHz; 5.0 V, Idqtotal = 350 mA (typ), LTE 10 MHz 50 RB
•
PAE : 13.4%
•
27.0 dBm linear P
out
@ ACPR1 = -50 dBc
[1]
•
38.3 dB Gain
•
Detector range : 20 dB
A
VAGO
43728
YYWW
XXXX
TOP VIEW
Notes:
Package marking provides
orientation and identification
”43728” = Device part number
”YYWW” = Year and work week
”XXXX” = Assembly lot number
Applications
•
Final stage high linearity amplifier for Picocell and
Enterprise Femtocell PA targeted for small cell BTS
downlink applications.
Note:
1. LTE 10MHz 50 RB Test Mode 1.1 downlink signal.
2. Enhancement mode technology employs positive V
GS
, thereby
eliminating the need of negative gate voltage associated with
conventional depletion mode devices.
Pin Configuration
28 Vdd1
26 Vdd2
24 Vdd3
23 Vdd3
22 Vdd3
27 Gnd
25 Gnd
Gnd 1
Gnd 2
NC 3
RFin 4
NC 5
Gnd 6
NC 7
21 Gnd
20 Gnd
19 RFout
18 RFout
17 RFout
16 Gnd
Functional Block Diagram
Vdd1
Vdd2
Vdd3
(5.0 x 5.0 x 0.9) mm
15 Gnd
RFin
1
st
Stage
2
nd
Stage
3
rd
Stage
RFout
Vc1 8
Vc2 9
Vc3 10
Gnd 11
VddBias 12
Gnd 13
Vdet 14
Biasing Circuit
Vc1 Vc2 Vc3
VddBias
Vdet
Absolute Maximum Rating
[1]
T
A
=25°C
Symbol
Vdd, VddBias
Vc
P
in,max
P
diss
T
j
T
STG
Thermal Resistance
[2,3]
Units
V
V
dBm
W
°C
°C
Parameter
Supply voltages, bias supply voltage
Control Voltage
CW RF Input Power
Total Power Dissipation
[3]
Junction Temperature
Storage Temperature
Absolute Max.
6.0
(Vdd)
20
7.2
150
-65 to 150
q
jc
= 16
°C/W
Notes:
1. Operation of this device in excess of any of
these limits may cause permanent damage.
2. Thermal resistance measured using Infra-
Red Measurement Technique at Vdd=5.5V
operating voltage.
3. Board temperature (T
B
) is 25
°C
, for T
B
>
34.8
°C
derate the device power at 62.5
mW per
°C
rise in Board (package belly)
temperature.
Electrical Specifications
T
A
= 25
°C,
Vdd1,2,3 = VddBias=5.0V, Idqtotal = 350mA, RF performance at 2.65 GHz, LTE 10MHz 50RB Test model 1.1
downlink signal operation unless otherwise stated.
Symbol
Vdd
Idqtotal
Gain
OP1dB
ACPR1 @ P
out
=27.0 dBm
PAE
S11
DetR
2fo
Parameter and Test Condition
Supply Voltage
Quiescent Supply Current
Gain
Output Power at 1dB Gain Compression
LTE 10MHz 50RB Test Mode 1.1 downlink signal
Power Added Efficiency
Input Return Loss, 50Ω source
Detector RF dynamic range
2fo Harmonics (LTE 10MHz 50RB Test Mode 1.1 downlink signal)
Units
V
mA
dB
dBm
dBc
%
dB
dB
dBc
Min.
Typ.
5.0
350
Max.
600
35
38.3
36
-50
12
13.4
22
20
-34
2
Product Consistency Distribution Charts
[1]
LSL
LSL
39
38
37
35
36
40
41
Figure 1. Gain at P
out
=27.0 dBm; LSL=35.0 dB, Nominal = 38.3dB
12
13
14
15
Figure 2. PAE at P
out
=27.0 dBm; LSL=12.0% Nominal = 13.4%
16
600
650
700
750
800
850
900
-60
-56
-52
-48
-44
-40
Figure 3. Idd_Total at P
out
=27.0 dBm, Nominal = 776 mA
Figure 4. ACLR1 at P
out
=27.0 dBm, Nominal = -50.0 dBc
Note:
1. Distribution data sample size is 1700 samples taken from 3 different wafer lots. T
A
= 25*C, Vdd=VddBias = 5.0V, Vc1=2.2V, Vc2=2.0V, Vc3=2.2V, RF
performance at 2.65 GHz, unless otherwise stated. Future wafers allocated to this product may have nominal values anywhere between the upper
and lower limits.
3
MGA-43728 typical over-temperature performance at Vc1=2.2V, Vc2=2.0V, Vc3=2.2V as shown in Figure 27, unless
otherwise stated
45
40
35
30
25
20
15
10
5
0
-5
-10
-15
-20
-25
-30
-35
-40
45
40
35
30
25
20
15
10
5
0
-5
-10
-15
-20
-25
-30
-35
-40
S21,S11,S22/dB
85
°C
25
°C
–40
°C
1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5
Frequency/GHz
S21,S11,S22/dB
85
°C
25
°C
–40
°C
1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5
Frequency/GHz
Figure 5. Small-signal performance Over-temperature
Vdd=VddBias=5.0V operating voltage
Figure 6. Small-signal performance Over-temperature
Vdd=VddBias=5.5V operating voltage
-36
-40
-44
ACLR1/dBc
-48
-52
-56
-60
-64
ACLR1_85
°C
PAE_85
°C
ACLR1_25
°C
PAE_25
°C
ACLR1_-40
°C
PAE_-40
°C
21
18
15
ACLR1/dBc
12
9
6
3
0
-36
-40
-44
-48
-52
-56
-60
-64
ACLR1_85
°C
PAE_85
°C
ACLR1_25
°C
PAE_25
°C
ACLR1_-40
°C
PAE_-40
°C
21
18
15
12
9
6
3
0
PAE/%
17
18
19
20
21
22
23
24
P
out
/dBm
25
26
27
28
29
17
18
19
20
21
22
23
24
P
out
/dBm
25
26
27
28
29
Figure 7. Over-temperature ACLR1, PAE vs P
out
@ 2.62 GHz
Vdd=VddBias=5.0V operating voltage
Figure 8. Over-temperature ACLR1, PAE vs P
out
@ 2.62 GHz
Vdd=VddBias=5.5V operating voltage
-36
-40
-44
ACLR1/dBc
-48
-52
-56
-60
-64
ACLR1_85
°C
PAE_85
°C
ACLR1_25
°C
PAE_25
°C
ACLR1_-40
°C
PAE_-40
°C
21
18
15
ACLR1/dBc
12
9
6
3
0
29
-36
-40
-44
PAE/%
-48
-52
-56
-60
-64
ACLR1_85
°C
PAE_85
°C
ACLR1_25
°C
PAE_25
°C
ACLR1_-40
°C
PAE_-40
°C
21
18
15
12
9
6
3
0
29
17
18
19
20
21
22
23
24
P
out
/dBm
25
26
27
28
17
18
19
20
21
22
23
24
P
out
/dBm
25
26
27
28
Figure 9. Over-temperature ACLR1, PAE vs P
out
@ 2.65 GHz
Vdd=VddBias=5.0V operating voltage
Figure 10. Over-temperature ACLR1, PAE vs P
out
@ 2.65 GHz
Vdd=VddBias=5.5V operating voltage
4
PAE/%
PAE/%
MGA-43728 typical over-temperature performance at Vc1=2.2V, Vc2=2.0V, Vc3=2.2V, unless otherwise stated
-36
-40
-44
ACLR1/dBc
-48
-52
-56
-60
-64
17
ACLR1_85
°C
PAE_85
°C
ACLR1_25
°C
PAE_25
°C
ACLR1_-40
°C
PAE_-40
°C
21
18
15
ACLR1/dBc
12
9
6
3
0
-36
-40
-44
-48
-52
-56
-60
-64
ACLR1_85
°C
PAE_85
°C
ACLR1_25
°C
PAE_25
°C
ACLR1_-40
°C
PAE_-40
°C
21
18
15
12
9
6
3
0
PAE/%
18
19
20
21
22
23
24
P
out
/dBm
25
26
27
28
29
17
18
19
20
21
22
23
24
P
out
/dBm
25
26
27
28
29
Figure 11. Over-temperature ACLR1, PAE vs P
out
@ 2.69 GHz
Vdd=VddBias=5.0V operating voltage
Figure 12. Over-temperature ACLR1, PAE vs P
out
@ 2.69 GHz
Vdd=VddBias=5.5V operating voltage
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
800
700
600
500
400
300
Idd_Total_85°C
Idd_Total_25°C
Idd_Total_-40°C
Idd total/mA
15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
P
out
/dBm
Figure 13. Over-temperature Idd_total vs P
out
@ 2.65 GHz
Vdd=VddBias=5.0V operating voltage
5
PAE/%
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