SY89465U
Precision LVDS 1:10 Fanout with 2:1 Runt
Pulse Eliminator MUX and Internal Termination
General Description
The SY89465U is a low-jitter, 1:10 LVDS fanout
buffer with a 2:1 differential input multiplexer (MUX)
optimized for redundant source switchover
applications. Unlike standard multiplexers, the
SY89465Us 2:1 Runt Pulse Eliminator (RPE) MUX
prevents any short cycles or “runt” pulses during
switchover. In addition, a unique Fail-Safe Input
(FSI) protection prevents metastable conditions
when the selected input clock fails to a DC voltage
(voltage between the pins of the differential input
drops below 100mV).
The differential input includes Micrel’s, 3-pin internal
termination architecture that allows customers to
interface to any differential signal (AC- or DC-
coupled) as small as 100mV (200mV
PP
) without any
level shifting or termination resistor networks in the
signal path. The outputs are LVDS-compatible with
fast rise/fall times guaranteed to be less than 220ps.
The SY89465U operates from a 2.5V ±5% supply
and is guaranteed over the full industrial
temperature range of –40°C to +85°C. The
SY89465U is part of Micrel’s high-speed, Precision
Edge
®
product line.
All support documentation can be found on Micrel’s
web site at:
www.micrel.com.
Precision Edge
®
Features
•
Selects between two sources, and provides 10
precision LVDS copies
•
Guaranteed AC performance over temperature and
supply voltage:
– Wide operating frequency: 1kHz to >1.5GHz
– <1200ps In-to-Out t
pd
– <220ps t
r
/t
f
•
Unique, patent-pending input isolation design
minimizes adjacent channel crosstalk
•
Fail-Safe Input prevents oscillations
•
Ultra-low jitter design:
– 183 fs
RMS
phase jitter (typical)
– <0.7ps
RMS
MUX crosstalk-induced jitter
•
Unique patented input termination and VT pin accepts
DC- and AC-coupled inputs (CML, PECL, LVDS)
•
325mV LVDS output swing
•
2.5V ±5% supply voltage
• −40°C
to +85°C industrial temperature range
•
Output enable
•
Available in 44-pin (7mm x 7mm) QFN package
Applications
•
Redundant clock switchover
•
Fail-safe clock protection
Markets
•
•
•
•
United States Patent No. RE44,134
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
LAN/WAN
Enterprise servers
ATE
Test and measurement
August 2010
M9999-080510-C
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89465U
Typical Application
Simplified Example Illustrating Runt Pulse Eliminator (RPE) when Primary Clock Fails
Ordering Information
Part Number
SY89465UMY
SY89465UMYTR
(2)
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
Package Type
QFN-44
QFN-44
Operating Range
Industrial
Industrial
Package Marking
SY89465U with
Pb-Free bar-line Indicator
SY89465U with
Pb-Free bar-line Indicator
Lead Finish
Matte-Sn
Pb-Free
Matte-Sn
Pb-Free
August 2010
2
M9999-080510-C
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89465U
Pin Configuration
44-Pin QFN
Pin Description
Pin Number
2, 5, 7, 10
Pin Name
IN0, /IN0
IN1, /IN1
Pin Function
Differential Inputs: These input pairs are the differential signal inputs to the device.
These inputs accept AC- or DC-coupled signals as small as 100mV (200mV
pp
). Each
pin of a pair internally terminates to a V
T
pin through 50Ω. Please refer to the “Input
Interface Applications” section for more details.
Reference Voltage: These outputs bias to V
CC
–1.2V. They are used for AC-coupling
inputs IN and /IN. Connect V
REF-AC
directly to the corresponding V
T
pin. Bypass with
0.01µF low ESR capacitor to V
CC
. Due to the limited drive capability, the V
REF-AC
pin
is only intended to drive its respective V
T
pin. Maximum sink/source current is
±1.5mA. Please refer to the “Input Interface Applications” section for more details.
Input Termination Center-Tap: Each side of the differential input pair terminates to a
V
T
pin. The V
T0
and V
T1
pins provide a center-tap to a termination network for
maximum interface flexibility. Please refer to the “Input Interface Applications” section
for more details.
Positive Power Supply: Bypass with 0.1µF||0.01µF low-ESR capacitors as close to
the V
CC
pins as possible.
4, 9
VREF-AC0
VREF-AC1
3, 8
13, 15, 22, 23
28, 33, 34, 41,
43, 44
39, 40
37, 38
35, 36
31, 32
29, 30
26, 27
24, 25
20, 21
18, 19
16, 17
VT0, VT1
VCC
/Q0, Q0
/Q1, Q1
/Q2, Q2
/Q3, Q3
/Q4, Q4
/Q5, Q5
/Q6, Q6
/Q7, Q7
/Q8, Q8
/Q9, Q9
Differential Outputs: These differential LVDS outputs are a logic function of the IN0,
IN1, and SEL inputs. Please refer to the “Truth Table” below for details.
August 2010
3
M9999-080510-C
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89465U
Pin Description (Continued)
Pin Number
42
1, 11, 6
Pin Name
SEL
GND,
Exposed Pad
Pin Function
This single-ended TTL/CMOS-compatible input selects the inputs to the multiplexer.
Note that this input is internally connected to a 25kΩ pull-up resistor and will default
to logic HIGH state if left open. V
TH
= V
CC
/2.
Ground: Ground and exposed pad must be connected to the same ground plane.
Power-on-Reset (POR) initialization capacitor. When using the multiplexer with RPE
capability, this pin is tied to a capacitor to V
CC
. The purpose is to ensure the internal
RPE logic starts up in a known state. See “Power-On Reset (POR) Description”
section for more details regarding capacitor selection. If this pin is tied directly to V
CC
,
the RPE function will be disabled and the multiplexer will function as a normal
multiplexer. The CAP pin should never be left open or tied directly to GND.
Single-Ended Input: This TTL/CMOS input disables and enables the Q0-Q9 outputs.
It is internally connected to a 25kΩ pull-up resistor and will default to a logic HIGH
state if left open. When disabled, CLK output goes LOW and /CLK goes HIGH. EN
being synchronous, outputs will be enabled/disabled when they are in LOW state.
Thus, a runt pulse is avoided if the device is enabled/disabled by an asynchronous
control. V
TH
= V
CC
/2.
12
CAP
14
EN
Truth Table
Inputs
IN0
0
1
X
X
/IN0
1
0
X
X
IN1
X
X
0
1
/IN1
X
X
1
0
SEL
0
0
1
1
Q
0
1
0
1
Outputs
/Q
1
0
1
0
August 2010
4
M9999-080510-C
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89465U
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
) ..........................–0.5V to +4.0V
Input Voltage (V
IN
) ..................................–0.5V to V
CC
Input Current (I
IN
) ........................................................
Source/Sink Current on IN, /IN ................ ±50mA
Source/Sink Current on V
T
..................... ±100mA
V
REF-AC
Current
Source/Sink Current on V
REF-AC
.................. ±2mA
Lead Temperature (soldering, 20 sec.) ..........+260°C
Storage Temperature (T
s
)..................–65°C to 150°C
Operating Ratings
(2)
Supply Voltage (V
CC
).................. +2.375V to +2.625V
Ambient Temperature (T
A
)................ –40°C to +85°C
Package Thermal Resistance
(3)
QFN (θ
JA
)
Still-Air .................................................. 24.4°C/W
QFN (ψ
JB
)
Junction-to-Board ................................... 8.1°C/W
DC Electrical Characteristics
(4)
T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
CC
I
CC
R
IN
R
DIFF_IN
V
IH
V
IL
V
IN
V
DIFF_IN
V
IN_FSI
V
T_IN
V
REF-AC
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is
not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
θ
JA
and
ψ
JB
values are determined for a 4-layer board in still air unless otherwise stated.
4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
5. V
IN
(max) is specified when V
T
is floating.
Parameter
Power Supply
Power Supply Current
Input Resistance (IN-to-V
T
)
Differential Input Resistance
(IN-to-/IN)
Input High Voltage (IN, /IN)
Input Low Voltage (IN, /IN)
Input Voltage Swing (IN, /IN)
Differential Input Voltage Swing
|IN-/IN|
Input Voltage Threshold that
Triggers FSI
IN-to-V
T
(IN, /IN)
Output Reference Voltage
Condition
No load, max V
CC
Min.
2.375
45
90
1.2
0
Typ.
2.5
250
50
100
Max.
2.625
325
55
110
V
CC
V
IH
– 0.1
2.5
Units
V
mA
Ω
Ω
V
V
V
V
See Figure 1a (Note 5)
See Figure 1b
0.1
0.2
30
100
1.28
mV
V
V
V
CC
– 1.3
V
CC
– 1.2
V
CC
– 1.1
August 2010
5
M9999-080510-C
hbwhelp@micrel.com
or (408) 955-1690
Microchip MCU
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